IP Library Granted Patent US 10,482,988
Granted Patent B2
US 10,482,988 · App. 15/815,521 · Granted Nov 19, 2019

Reclaimable semiconductor device package and associated systems and methods

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Quick Facts
Patent No.
US 10,482,988
App. No.
15/815,521
Granted
Nov 19, 2019
Kind
B2
Abstract

Several embodiments of reclaimable semiconductor device packages and assemblies are disclosed herein. A semiconductor device assembly ( 100 ) includes a package ( 101 ) having a housing ( 102 ) and a package contact ( 104 ) arranged to receive a signal indicative of a reclamation state. A plurality of modules of semiconductor dies ( 106 ) are located within the housing and electrically coupled to the package contact ( 104 ). The dies ( 106 ) of the first and second modules dies are configured to store a module configuration state. The first and second modules ( 107 a, 107 b ) are enabled for operation based, at least in part, on the reclamation state and the module configuration state.

Claims (16)

1. A method of reclaiming a semiconductor device package having a plurality of semiconductor dies arranged in at least a first module of a first plurality of semiconductor dies and a second module of a second plurality of semiconductor dies, the method comprising:

determining whether a first semiconductor die in the first module is inoperable and whether a second semiconductor die in the second module is inoperable, wherein the second semiconductor die is different from the first semiconductor die;

storing a configuration state at a third semiconductor die in the semiconductor device package based on whether the first semiconductor die is inoperable and the second semiconductor die is inoperable, the configuration state indicative of which modules in the semiconductor device package are operable;

coupling a package contact of the semiconductor device package with a first contact on a support substrate when none of the modules are inoperable; and

coupling the package contact of the semiconductor device package with a second contact on the support substrate when at least one of the modules is inoperable, wherein the second contact is different from the first contact.

2. The method of claim 1 , further comprising:

determining whether first module is inoperable based on whether the first semiconductor die is inoperable and whether the second module is inoperable based on whether the second semiconductor die is inoperable;

receiving a first signal via the first contact on the support substrate when none of the modules are inoperable; and

receiving a second signal via the second contact on the support substrate when the at least one of the modules is inoperable, wherein the second signal is configured to disable the at least one module based on the configuration state.

3. The method of claim 1 , wherein the third semiconductor die is located in the first module.

4. The method of claim 1 , wherein the third semiconductor die is located in the second module.

5. The method of claim 1 , wherein determining whether the first semiconductor die is inoperable comprises determining whether the first semiconductor die is operating below a yield threshold.

6. The method of claim 1 , further comprising programming the configuration state at the first plurality of semiconductor dies of the first module and the second plurality of semiconductor dies of the second module.

7. The method of claim 2 , wherein the first signal has different logic levels and the second signal has a single logic level.

8. The method of claim 2 , further comprising:

operating without the at least one module based on receiving the second signal and based on the configuration state stored at the third semiconductor die, wherein the at least one module includes one or more semiconductor dies that are operable.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050716/0678 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 7 TO PATENT SECURITY AGREEMENT Recorded Feb 6, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 045267/0833 →