IP Library Granted Patent US 10,084,047
Granted Patent B2
US 10,084,047 · App. 15/821,439 · Granted Sep 25, 2018

Group III-V device structure with variable impurity concentration

Inventor: Michael A. Briere (Scottsdale, AZ)
Assignee: Infineon Technologies Americas Corp.
H01L29/2003H01L21/0251H01L21/0254H01L21/0262H01L21/02389H01L21/02458H01L21/02505H01L21/02584H01L29/157H01L29/207H01L29/66462H01L29/7787
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Quick Facts
Patent No.
US 10,084,047
App. No.
15/821,439
Granted
Sep 25, 2018
Kind
B2
Abstract

A semiconductor structure includes a substrate, a transition body over the substrate, a group III-V intermediate body having a bottom surface over the transition body and a group III-V device layer over a top surface of the group III-V intermediate body. The group III-V intermediate body has a first impurity concentration at the bottom surface, a second impurity concentration at the top surface, and a variable impurity concentration that rises and falls between the bottom surface and the top surface. The first impurity concentration is greater than the second impurity concentration.

Claims (35)

1. A semiconductor structure, comprising:

a substrate;

a transition body over the substrate;

a group III-V intermediate body having a bottom surface over the transition body; and

a group III-V device layer over a top surface of the group III-V intermediate body,

wherein the group III-V intermediate body has a first impurity concentration at the bottom surface, a second impurity concentration at the top surface, and a variable impurity concentration that rises and falls between the bottom surface and the top surface,

wherein the first impurity concentration is greater than the second impurity concentration.

2. The semiconductor structure of claim 1 , wherein an impurity producing the first impurity concentration at the bottom surface, the second impurity concentration at the top surface and the variable impurity concentration is a P type impurity.

3. The semiconductor structure of claim 1 , wherein the variable impurity concentration is a variable carbon concentration.

4. The semiconductor structure of claim 1 , wherein the variable impurity concentration includes a plurality of impurity species.

5. The semiconductor structure of claim 1 , wherein the group III-V intermediate body comprises a compositionally graded III-Nitride body having a first III-Nitride composition at the bottom surface and a second III-Nitride composition above the bottom surface.

6. The semiconductor structure of claim 1 , wherein the transition body includes a group III-V transition structure having a selectively modified impurity concentration such that a bottom surface impurity concentration of the group III-V transition structure is selectively modified to a top surface impurity concentration of the group III-V transition structure.

7. The semiconductor structure of claim 6 , wherein the selectively modified impurity concentration is modified in a step-wise fashion from the bottom surface impurity concentration to the top surface impurity concentration.

8. The semiconductor structure of claim 6 , wherein the selectively modified impurity concentration rises and falls between the bottom surface impurity concentration and the top surface impurity concentration.

9. A method, comprising:

fabricating a transition body over a substrate;

fabricating a group III-V intermediate body having a bottom surface over the transition body; and

fabricating a group III-V device layer over a top surface of the group III-V intermediate body,

wherein fabricating the group III-V intermediate body comprises providing a first impurity concentration at the bottom surface, a second impurity concentration at the top surface, and a variable impurity concentration that rises and falls between the bottom surface and the top surface, the first impurity concentration being greater than the second impurity concentration.

10. The method of claim 9 , wherein an impurity producing the first impurity concentration at the bottom surface, the second impurity concentration at the top surface and the variable impurity concentration is a P type impurity.

11. The method of claim 9 , wherein the variable impurity concentration is a variable carbon concentration.

12. The method of claim 9 , wherein the variable impurity concentration includes a plurality of impurity species.

13. The method of claim 9 , wherein the group III-V intermediate body comprises a compositionally graded III-Nitride body having a first III-Nitride composition at the bottom surface and a second III-Nitride composition above the bottom surface.

14. The method of claim 9 , wherein fabricating the transition body comprises fabricating a group III-V transition structure having a selectively modified impurity concentration such that a bottom surface impurity concentration of the group IH-V transition structure is selectively modified to a top surface impurity concentration of the group III-V transition structure.

15. The method of claim 14 , wherein the selectively modified impurity concentration is reduced in a step-wise fashion from the bottom surface impurity concentration to the top surface impurity concentration.

16. The method of claim 14 , wherein the selectively modified impurity concentration rises and falls between the bottom surface impurity concentration and the top surface impurity concentration.

17. A semiconductor structure, comprising:

a substrate;

a transition body over the substrate;

a group III-V intermediate body having a bottom surface over the transition body; and

a group III-V device layer over a top surface of the group III-V intermediate body,

wherein the group III-V intermediate body comprises a variable impurity concentration that rises and falls a plurality of times between the bottom surface and the top surface.

18. The semiconductor structure of claim 17 , wherein an impurity producing the variable impurity concentration is a P type impurity.

19. The semiconductor structure of claim 17 , wherein the variable impurity concentration is a variable carbon concentration.

20. The semiconductor structure of claim 17 , wherein the variable impurity concentration includes a plurality of impurity species.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2017
From: BRIERE, MICHAEL A.
To: INTERNATIONAL RECTIFIER CORPORATION
Reel/Frame 044202/0174 →
MERGER AND CHANGE OF NAME Recorded Nov 22, 2017
From: INTERNATIONAL RECTIFIER CORPORATION; INFINEON TECHNOLOGIES NORTH AMERICA CORP.
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 044202/0197 →
Continuity (6)
Continuation 15421073 · Jan 31, 2017
Division 14844283 · Sep 3, 2015
Continuation 14449057 · Jul 31, 2014
Division 13604517 · Sep 5, 2012
Provisional Application 61537540 · Sep 21, 2011
Related Publication 20180097072A1 · Apr 5, 2018