Method of forming memory device with diffusion barrier and capping layer

1. A method for forming a semiconductor device structure, comprising:

forming a lower electrode layer over a semiconductor substrate;

forming a data storage layer over the lower electrode layer;

forming an ion diffusion barrier layer over the data storage layer, wherein the ion diffusion barrier layer is a metal material doped with nitrogen, carbon, or a combination thereof;

forming a capping layer directly on the ion diffusion barrier layer;

forming an upper electrode layer over the capping layer;

patterning the upper electrode layer, the capping layer, and the ion diffusion barrier layer to expose the data storage layer;

forming a protective element over sidewalls of the upper electrode layer, the capping layer, and the ion diffusion barrier layer after the data storage layer is exposed, wherein

the protective element is formed to be in contact with an interface between the data storage layer and the ion diffusion barrier layer; and

patterning the data storage layer and the lower electrode layer after the protective element is formed.

2. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the data storage layer is partially removed during the patterning of the upper electrode layer, the capping layer, and the ion diffusion barrier layer.

3. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the data storage layer is a metal oxide layer.

4. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the ion diffusion barrier layer is formed to have an atomic concentration of nitrogen or carbon that is in a range from about 10% to about 45%.

5. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the ion diffusion barrier layer is formed using a metal-containing gas and a dopant-containing gas, and the dopant containing gas comprises a nitrogen-containing gas, a carbon-containing gas, or a combination thereof.

6. The method for forming a semiconductor device structure as claimed in claim 1 , further comprising planarizing the lower electrode layer before the data storage layer is formed.

7. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the ion diffusion barrier layer is formed directly on the data storage layer.

8. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the capping layer is formed to be thicker than the ion diffusion barrier layer.

9. The method for forming a semiconductor device structure as claimed in claim 1 , wherein the capping layer is made of a pure metal material, and the capping layer is made of titanium, hafnium, zirconium, tantalum, nickel, or tungsten.

10. A method for forming a semiconductor device structure, comprising:

forming a lower electrode layer over a semiconductor substrate;

forming a resistance variable layer over the lower electrode layer;

forming a barrier layer over the resistance variable layer;

forming a capping layer over the barrier layer;

forming an upper electrode layer over the capping layer;

partially etching the upper electrode layer, the capping layer, and the barrier layer to expose the resistance variable layer; and

forming a protective element over sidewalls of the upper electrode layer, the capping layer, and the barrier layer after the resistance variable layer is exposed, wherein the protective element is formed to be in contact with an interface between the resistance variable layer and the barrier layer.

11. The method for forming a semiconductor device structure as claimed in claim 10 , wherein the barrier layer is a metal material doped with nitrogen or carbon.

12. The method for forming a semiconductor device structure as claimed in claim 11 , wherein the barrier layer is formed to have an atomic concentration of nitrogen or carbon that is in a range from about 10% to about 45%.

13. The method for forming a semiconductor device structure as claimed in claim 10 , further comprising partially etching the resistance variable layer and the lower electrode layer after the protective element is formed.

14. The method for forming a semiconductor device structure as claimed in claim 10 , further comprising:

forming a dielectric layer over the semiconductor substrate before the lower electrode layer is formed; and

forming an opening in the dielectric layer, wherein a portion of the lower electrode layer and a portion of the resistance variable layer are formed in the opening of the dielectric layer.

15. The method for forming a semiconductor device structure as claimed in claim 10 , wherein the capping layer is made of a pure metal material, and the capping layer is made of titanium, hafnium, zirconium, tantalum, nickel, or tungsten.

16. A method for forming a semiconductor device structure, comprising:

forming a lower electrode layer over a semiconductor substrate;

forming a resistance variable layer over the lower electrode layer;

forming an ion diffusion barrier layer directly on the resistance variable layer, wherein the ion diffusion barrier layer is a conductive material doped with nitrogen, carbon, or a combination thereof;

forming a capping layer directly on the ion diffusion barrier layer;

forming an upper electrode layer over the capping layer;

forming a protective element over sidewalls of the upper electrode layer, the capping layer, and the ion diffusion barrier layer, wherein the protective element is formed to be in contact with an interface between the resistance variable layer and the ion diffusion barrier layer.

17. The method for forming a semiconductor device structure as claimed in claim 16 , wherein the ion diffusion barrier layer is formed to have an atomic concentration of nitrogen or carbon that is in a range from about 10% to about 45%.

18. The method for forming a semiconductor device structure as claimed in claim 16 , wherein the capping layer is formed to be thicker than the ion diffusion barrier layer.

19. The method for forming a semiconductor device structure as claimed in claim 16 , further comprising:

partially etching the upper electrode layer, the capping layer, and the ion diffusion layer before the protective element is formed; and

partially etching the resistance variable layer and the lower electrode layer after the protective element is formed.

20. The method for forming a semiconductor device structure as claimed in claim 19 , wherein a bottom surface of the protective element is between a top surface of the resistance variable layer and a bottom surface of the resistance variable layer.