Power interrupt management

1. A method for power interrupt management in memory, comprising:

determining transaction log information associated with a corrupt page of a transaction log by searching locations in memory indicated by write look ahead information, wherein the write look ahead information is created using information from a wear leveling algorithm that includes location information of a number of newly free blocks created during a wear leveling operation and wherein the transaction log information is determined by checking the number of newly free blocks for a revision number that indicates a valid write has occurred.

2. The method of claim 1 , wherein the write look ahead information includes information about a location where data would have next been written a memory system.

3. The method of claim 1 , wherein the write look ahead information includes information about the location where data had most recently been written a memory system.

4. The method of claim 1 , further comprising creating write look ahead information using information from the wear leveling algorithm about a location where data had most recently been written and would have next been written.

5. The method of claim 1 , further comprising creating write look ahead information using information from a garbage collection algorithm about a location where data had most recently been written and would have next been written.

6. The method of claim 1 , further including periodically storing a logical address (LA) table in non-volatile memory by copying a LA table in volatile memory.

7. The method of claim 6 , further including recording the transaction log information in the transaction log, wherein the transaction log information includes information about writes that occurred in a memory system including the non-volatile memory after a most recent time the LA table in volatile memory was copied in non-volatile memory.

8. The method of claim 1 , wherein the method includes using the write look ahead information to find a location in memory and verifying a valid write occurred at the location by locating a revision number associated with the data at the location.

9. A method for power interrupt management in a memory system, comprising:

updating a transaction log to recreate a corrupt page of the transaction log by:

locating write operation information about transactions that occurred in the memory system and are not in the transaction log or a logical address (LA) table in non-volatile memory by searching locations in memory indicated by write look ahead information, wherein the write look ahead information is created using information from a wear leveling algorithm that includes location information of a number of newly free blocks created during a wear leveling operation and wherein the write operation information is located by checking the number of newly free blocks for a revision number that indicates a valid write has occurred; and

writing the write operation information to the transaction log.

10. The method of claim 9 , further including finding write operation information about the transactions by determining a location where data would have been written next in the memory system from the write look ahead information.

11. The method of claim 9 , further including determining a location where the data would have been written next comprises using the wear leveling algorithm.

12. The method of claim 9 , wherein updating the transaction log comprises updating a last page of the transaction log that became corrupt after a power interrupt.

13. The method of claim 9 , further comprising verifying the write operation information is valid by identifying a revision indicator associated with the write operation information.

14. The method of claim 9 , further comprising updating the LA table in non-volatile memory using the updated transaction log associated with the corrupt page.

15. The method of claim 9 , wherein updating the LA table in non-volatile memory using the updated transaction log comprises adding information about a write that occurred between a last time the LA table was copied into the non-volatile memory and a power interrupt.

16. A memory system, comprising:

solid state non-volatile memory, wherein the non-volatile memory is configured to store a logical address (LA) table and a transaction log; and

a controller configured to:

write transaction log information associated with a corrupt page of a transaction log to the transaction log, wherein write look ahead information is used to determine the transaction log information associated with the corrupt page of the transaction log by searching locations in memory indicated by write look ahead information, wherein the transaction log information identifies transactions that occurred in the memory system, and wherein the write look ahead information is created using information from a wear leveling algorithm that includes location information for prior and future write operations and location information of a number of newly free blocks created during a wear leveling operation, and wherein the transaction log information is created by checking the number of newly free blocks for a revision number that indicates a valid write has occurred.

17. The memory system of claim 16 , wherein the LA table is in non-volatile memory and wherein the controller is further configured to store a copy of the updated LA table in volatile memory.

18. The memory system of claim 16 , wherein the transaction log is configured to record information about writes occurring in the memory system after storing the LA table in non-volatile memory.

19. The memory system of claim 16 , wherein the controller is configured to determine the write look ahead information that indicates where data would have been written next in the memory system using a wear leveling algorithm.

20. The memory system of claim 16 , wherein a capacitor is coupled to the non-volatile memory to provide power temporarily to the memory system after the power interrupt.