IP Library Granted Patent US 10,650,978
Granted Patent B2
US 10,650,978 · App. 15/843,278 · Granted May 12, 2020

Methods of incorporating leaker devices into capacitor configurations to reduce cell disturb

Inventors: Ashonita A. Chavan (Boise, ID); Beth R. Cook (Boise, ID); Manuj Nahar (Boise, ID); Durai Vishak Nirmal Ramaswamy (Boise, ID)
Assignee: Micron Technology, Inc.
H01G4/385G11C11/221H01L27/11507H01L28/56H01L28/91
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,650,978
App. No.
15/843,278
Granted
May 12, 2020
Kind
B2
Abstract

Some embodiments include an apparatus having horizontally-spaced bottom electrodes supported by a supporting structure. Leaker device material is directly against the bottom electrodes. Insulative material is over the bottom electrodes, and upper electrodes are over the insulative material. Plate material extends across the upper electrodes and couples the upper electrodes to one another. The plate material is directly against the leaker device material. The leaker device material electrically couples the bottom electrodes to the plate material, and may be configured to discharge at least a portion of excess charge from the bottom electrodes to the plate material. Some embodiments include methods of forming apparatuses which include capacitors having bottom electrodes and top electrodes, with the top electrodes being electrically coupled to one another through a conductive plate. Leaker devices are formed to electrically couple the bottom electrodes to the conductive plate.

Claims (20)

1. A method of forming an apparatus, comprising:

forming openings extending into a supporting structure;

lining the openings with bottom electrode material, the bottom electrode material within each opening forming an upwardly-opening container-shaped bottom electrode having an interior region; an upper surface of each of the upwardly-opening container-shaped bottom electrodes being recessed to below an upper surface of the supporting structure;

lining the interior regions of the upwardly-opening container-shaped bottom electrodes with insulative material to narrow the interior regions of each of the upwardly-opening container-shaped bottom electrodes;

forming upper electrodes within the narrowed interior regions of each of the upwardly-opening container-shaped bottom electrodes; the upper electrodes, insulative material and each of the upwardly-opening container-shaped bottom electrodes together forming a plurality of capacitors;

forming plate material extending across the upper electrodes and coupling the upper electrodes to one another; and

forming leaker devices electrically coupling each of the upwardly-opening container-shaped bottom electrodes to the plate material.

2. The method of claim 1 wherein the insulative material is ferroelectric insulative material.

3. The method of claim 1 wherein the leaker devices comprise one or more of Ti, Ni and Nb, in combination with one or more of Ge, Si, O, N and C.

4. The method of claim 1 wherein the leaker devices comprise one or more of Si, Ge, SiN, TiSiN, TiO, TiN, NiO, NiON and TiON; where the chemical formulas indicate primary constituents rather than particular stoichiometries.

5. The method of claim 1 wherein the leaker devices comprise titanium, oxygen and nitrogen.

6. The method of claim 1 wherein the leaker devices comprise continuous vertically-extending segments.

7. The method of claim 1 wherein the leaker devices comprise discontinuous vertically-extending segments.

8. The method of claim 1 wherein the leaker devices comprise vertically-extending segments having horizontal thicknesses within a range of from about 2 Å to about 20 Å.

9. The method of claim 1 wherein the leaker devices comprise vertically-extending segments having horizontal thicknesses within a range of from about 6 Å to about 15 Å.

10. The method of claim 1 wherein each of the openings has an exposed sidewall region above the recessed upper surface of the upwardly-opening container-shaped bottom electrode contained therein; and wherein the forming of the leaker devices comprises forming leaker device material to extend along the exposed sidewall regions and along the interior regions of each of the upwardly-opening container-shaped bottom electrodes.

11. The method of claim 1 wherein the leaker devices comprise leaker device material; and wherein the supporting structure comprises a first material over a second material, with an interface between the first and second materials being beneath the recessed upper surfaces of each of the upwardly-opening container-shaped bottom electrodes; and further comprising:

after forming the upper electrodes, removing the first material to leave upper regions of each of the capacitors exposed; the exposed upper regions of each of the capacitors having an exposed upper sidewall region which includes a portion an associated one of the upwardly-opening container-shaped bottom electrodes and a portion of the insulative material over the portion of the associated one of the upwardly-opening container-shaped bottom electrodes;

forming the leaker device material to extend along the exposed upper sidewall regions of each of the capacitors; the leaker device material along each of the exposed upper sidewall regions being configured as a vertically-extending leaker device which extends along the portion of the associated one of the upwardly-opening container-shaped bottom electrodes and along the portion of the insulative material; and

forming the plate material to be over the capacitors and along the upper sidewall regions of the capacitors; the plate material along the upper sidewall regions of the capacitors being directly against the vertically-extending leaker devices.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050716/0678 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 7 TO PATENT SECURITY AGREEMENT Recorded Feb 6, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 045267/0833 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2017
From: CHAVAN, ASHONITA A.; COOK, BETH R.; NAHAR, MANUJ; RAMASWAMY, DURAI VISHAK NIRMAL
To: MICRON TECHNOLOGY, INC.
Reel/Frame 044406/0535 →
Continuity (1)
Related Publication 20190189357A1 · Jun 20, 2019
Cited By (1)
US 12,328,865