Transistors comprising at lease one of GaP, GaN, and GaAs

1. A transistor comprising:

a pair of source/drain regions having a channel region there-between;

a transistor gate construction operatively proximate the channel region;

the channel region comprising a direction of current flow there-through between the pair of source/drain regions, the channel region comprising at least one of GaP, GaN, and GaAs extending all along the current-flow direction;

each of the source/drain regions comprising at least one of GaP, GaN, and GaAs extending completely through the respective source/drain region orthogonal to the current-flow direction, the at least one of the GaP, the GaN, and the GaAs of the respective source/drain region being directly against the at least one of the GaP, the GaN, and the GaAs of the channel region;

each of the source/drain regions comprising at least one of elemental silicon and metal material extending completely through the respective source/drain region orthogonal to the current-flow direction;

the channel region as respects GaP, GaN, and GaAs comprising only one of the GaP, the GaN, and the GaAs extending all along the current-flow direction; and

as respects GaP, GaN, and GaAs, each of the source/drain regions comprising only one other of the GaP, the GaN, and the GaAs extending completely through the respective source/drain region orthogonal to the current-flow direction.

2. The transistor of claim 1 wherein the at least one of the elemental silicon and the metal material of the respective source/drain region is directly against the at least one of the GaP, the GaN, and the GaAs of the respective source/drain region.

3. The transistor of claim 1 wherein one of the source/drain regions comprises elemental silicon and the other source/region consists essentially of metal material.

4. The transistor of claim 1 wherein the transistor is elevationally-extending.

5. The transistor of claim 1 wherein the transistor is horizontally-extending.

6. The transistor of claim 1 wherein the gate construction is over laterally-opposing sides of the channel region in straight-line vertical cross-section.

7. The transistor of claim 6 wherein the gate construction is over only two laterally-opposing sides of the channel region in straight-line vertical cross-section.

8. The transistor of claim 6 wherein the gate construction completely encircles the channel region in all straight-line vertical cross-sections.

9. The transistor of claim 1 wherein the gate construction is over only one lateral side of the channel region in straight-line vertical cross-section.

10. The transistor of claim 1 wherein the direction of current flow is straight-linear.

11. The transistor of claim 1 wherein the transistor is a thin-film transistor.

12. The transistor of claim 1 wherein the channel region comprises GaP extending all along the current-flow direction.

13. The transistor of claim 1 wherein the channel region comprises GaN extending all along the current-flow direction.

14. The transistor of claim 1 wherein the channel region comprises GaAs extending all along the current-flow direction.

15. The transistor of claim 1 wherein the source/drain regions comprise GaP extending completely through the respective source/drain region orthogonal to the current-flow direction.

16. The transistor of claim 1 wherein the source/drain regions comprise GaN extending completely through the respective source/drain region orthogonal to the current-flow direction.

17. The transistor of claim 1 wherein the source/drain regions comprise GaAs extending completely through the respective source/drain region orthogonal to the current-flow direction.

18. The transistor of claim 5 wherein the other source/drain region consists of metal material.

19. The transistor of claim 5 wherein the one source/drain region consists essentially of silicon and conductivity-enhancing impurity therein.

20. The transistor of claim 19 wherein the one source/drain region consists of silicon and conductivity-enhancing impurity therein.

21. The transistor of claim 1 wherein the channel region consists essentially of the one of the GaP, the GaN, and the GaAs extending all along the current-flow direction.

22. The transistor of claim 21 wherein the channel region consists of the one of the GaP, the GaN, and the GaAs extending all along the current-flow direction.

23. The transistor of claim 1 wherein the channel region consists essentially of the one of the GaP, the GaN, and the GaAs and conductivity-enhancing impurity therein extending all along the current-flow direction.

24. The transistor of claim 23 wherein the channel region consists of the one of the GaP, the GaN, and the GaAs and conductivity-enhancing impurity therein extending all along the current-flow direction.

25. The transistor of claim 1 wherein each of the source/drain regions consists essentially of the only one other of the GaP, the GaN, and the GaAs extending completely through the respective source/drain region orthogonal to the current-flow direction.

26. The transistor of claim 25 wherein each of the source/drain regions consists of the only one other of the GaP, the GaN, and the GaAs extending completely through the respective source/drain region orthogonal to the current-flow direction.

27. The transistor of claim 1 wherein each of the source/drain regions consists essentially of the only one other of the GaP, the GaN, and the GaAs and conductivity-enhancing impurity therein extending completely through the respective source/drain region orthogonal to the current-flow direction.

28. The transistor of claim 27 wherein each of the source/drain regions consists of the only one other of the GaP, the GaN, and the GaAs and conductivity-enhancing impurity therein extending completely through the respective source/drain region orthogonal to the current-flow direction.