IP Library Granted Patent US 10,199,310
Granted Patent B2
US 10,199,310 · App. 15/852,388 · Granted Feb 5, 2019

Semiconductor device and process for fabricating the same

Inventor: Masamichi Ishihara (Fukuoka, JP)
Assignee: LAPIS SEMICONDUCTOR CO., LTD.
H01L23/481H01L23/3157H01L23/488H01L23/49838H01L24/13H01L25/04H01L25/0652H01L25/0657H01L29/78H01L23/48H01L2224/0554H01L2224/05573H01L2224/05624H01L2224/05647H01L2224/05655H01L2224/05666H01L2224/05684H01L2224/13025H01L2224/1403H01L2224/16145H01L2224/16146H01L2224/16148H01L2224/16225H01L2224/17181H01L2224/81191H01L2224/81193H01L2225/06513H01L2225/06541H01L2924/00014H01L2924/01327H01L2924/10253H01L2924/12044H01L2924/14H01L2924/1461H01L2924/15311H01L2924/3011
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Quick Facts
Patent No.
US 10,199,310
App. No.
15/852,388
Granted
Feb 5, 2019
Kind
B2
Abstract

A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

Claims (9)

1. A semiconductor device comprising:

a semiconductor substrate having a first main surface, at which an active element is provided, and a second main surface opposing the first main surface;

an insulating layer that covers the first main surface of the semiconductor substrate and the active element;

a wiring portion that contacts the first main surface via the insulating layer;

a through-type electrode that penetrates through the semiconductor substrate from the first main surface to the second main surface; and

a connecting hole that connects the wiring portion and the through-type electrode, the connecting hole having a diameter that is smaller than a diameter of the through-type electrode.

2. The semiconductor device according to claim 1 , wherein the wiring portion is connected with the active element via another connecting hole.

3. The semiconductor device according to claim 1 , further comprising a multilayer wiring part that covers the insulating layer and the wiring portion, and in which wirings and insulating films are laminated, wherein the active element and the through-type electrode are electrically connected via the multilayer wiring part.

4. The semiconductor device according to claim 1 , further comprising another insulating layer that covers the second main surface of the semiconductor substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2022
From: ACHLYS TECHNOLOGIES INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 060244/0398 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2022
From: LAPIS SEMICONDUCTOR CO., LTD.
To: ACHLYS TECHNOLOGIES INC.
Reel/Frame 059559/0280 →
Priority Claims (1)
JP 2003-370651 · Oct 30, 2003 · national
Continuity (6)
Continuation 15384658 · Dec 20, 2016
Continuation 14743103 · Jun 18, 2015
Continuation 14157093 · Jan 16, 2014
Continuation 13093220 · Apr 25, 2011
Division 10577863
Related Publication 20180122722A1 · May 3, 2018