Apparatus and methods for via connection with reduced via currents
View Patent ↗Apparatuses and methods including conductive vias of a printed circuit board are described. An example apparatus includes a first layer including a first conductive plate; a component on the first layer, a second layer including a second conductive plate that may be coupled to an external power source; a third layer between the first layer and the second layer, the third layer including a third conductive plate; a first via coupling the first conductive plate to the second conductive plate; and a second via coupled to the first conductive plate. The first conductive plate includes a first portion coupled to the first via and the first conductive plate further includes a second portion coupled to the second via between the first portion and the component. The second via is coupled to either the second conductive plate or the third conductive plate.
1. An apparatus comprising:
a printed circuit board (PCB); and
an electronic component mounted on the PCB,
wherein the PCB comprises:
a first plane including a first conductive region, and wherein the first conductive region includes a first portion, a second portion and a third portion;
a second plane including a second conductive region;
a third plane including a third conductive region,
a first conductive via between the third portion of the first conductive region and the second conductive region, the first conductive via electrically insulated from the third conductive region of the third plane;
a second conductive via between the second portion of the first conductive region and the second conductive region; and,
a third conductive via between the second portion of the first conductive region, the second conductive region, and the third conductive region.
2. The apparatus of claim 1 , wherein the electronic component is coupled to the first portion of the first conductive region.
3. The apparatus of claim 2 , wherein a pin of the electronic component couples the first portion of the first conductive region to the electronic component.
4. The apparatus of claim 1 , wherein the first, second and third planes are disposed at different levels from one another.
5. The apparatus of claim 1 , wherein an electrical path between the third portion of the first conductive region and the second conductive region includes the second conductive via and the third conductive region.
6. The apparatus of claim 1 , wherein an impedance of the first conductive via is greater than an impedance of the second and third conductive vias.
7. The apparatus of claim 1 , further comprising:
a fourth conductive via,
wherein all four of the first through fourth conductive vias are connected to the first conductive region of the first plane, fewer than four of the first through fourth conductive vias are connected to the second conductive region of the second plane, and fewer than three of the first through fourth conductive vias are connected to the third conductive region of the third plane.
8. An apparatus comprising:
a first layer including a first conductive plate;
a second layer including a second conductive plate;
a third layer between the first layer and the second layer, wherein the third layer includes a third conductive plate;
a first via configured to couple the first conductive plate to the second conductive plate and the third conductive plate;
a second via configured to couple the first conductive plate to the second conductive plate, the second via insulated from the third conductive plate; and
a third via configured to couple the second conductive plate to the third conductive plate,
wherein the first conductive plate includes a first portion coupled to the first via and the first conductive plate further includes a second portion coupled to the second via.
9. The apparatus of claim 8 , further comprising a component on the first layer, the second portion coupled to the second via between the first portion and the component.
10. The apparatus of claim 8 , wherein the second via is decoupled from the third conductive plate.
11. The apparatus of claim 8 , wherein the second via is located in the third layer.
12. The apparatus of claim 8 , wherein the second conductive plate is configured to be coupled to a voltage source.
13. The apparatus of claim 8 , wherein the third via is insulated from the first conductive plate.
14. The apparatus of claim 8 , wherein the third via is located opposite to the second via with respect to the first via.
15. The apparatus of claim 8 , wherein an impedance of an electrical path in the second via is greater than an impedance of an electrical path in the first via.
16. The apparatus of claim 8 , further comprising:
a fourth via,
wherein all four of the first through fourth vias are connected to the first conductive plate, fewer than four of the first through fourth vias are connected to the second conductive plate, and fewer than three of the first through fourth vias are connected to the third plate.