Low resistance seed enhancement spacers for voidless interconnect structures

1. A structure comprising a first interconnect level, the first interconnect level comprising:

a first interconnect dielectric material layer containing a first opening having vertical sidewalls and a bottom wall;

a first diffusion barrier liner located in the first opening and lining the vertical sidewalls and the bottom wall of the first opening;

a first seed enhancement spacer directly contacting each inner sidewall of the first diffusion barrier liner and comprising a metal or metal alloy that facilitates movement of an interconnect metal or metal alloy during a reflow anneal process, and is selected from the group consisting of at least one of ruthenium, rhodium, iridium, osmium and cobalt; and

a first interconnect metal or metal alloy structure directly contacting inner sidewalls of each first seed enhancement spacer and directly contacting a horizontal portion of the first diffusion barrier liner that is located on the bottom wall of the first opening.

2. The structure of claim 1 , wherein the metal or metal alloy that provides each first seed enhancement spacer has a resistivity of 15E-8 ohm-meter or less.

3. The structure of claim 1 , wherein each first seed enhancement spacer is I-shaped.

4. The structure of claim 1 , wherein each of the first diffusion barrier liner, the first seed enhancement spacers, and the first interconnect metal or metal alloy structure has a topmost surface that is coplanar with each other and with a topmost surface of the first interconnect dielectric material layer.

5. The structure of claim 1 , wherein the first diffusion barrier liner is U-shaped.

6. The structure of claim 1 , further comprising a dielectric cap layer located on the first interconnect level.

7. A method of forming a structure, the method comprising:

providing an opening in an interconnect dielectric material layer;

forming a diffusion barrier material layer in the opening and on a topmost surface of the interconnect dielectric material layer; forming a seed enhancement pre-spacer directly contacting each inner sidewall of the diffusion barrier material layer;

forming an interconnect metal or metal alloy on physically exposed surfaces of the seed enhancement pre-spacers and the diffusion barrier material layer, wherein the forming of the interconnect metal or metal alloy comprises a reflow anneal, and wherein the seed enhancement pre-spacer comprises a metal or metal alloy that facilitates movement of the interconnect metal or metal alloy during the reflow anneal, and is selected from the group consisting of at least one of ruthenium, rhodium, iridium, osmium, and cobalt; and

removing portions of the interconnect metal or metal alloy, the seed enhancement pre-spacers and the diffusion barrier material layer outside the opening to provide an interconnect structure in the opening, the interconnect structure comprising a remaining portion of the diffusion barrier material layer located in the opening and lining vertical sidewalls and a bottom wall of the opening, a remaining portion of the seed enhancement pre-spacer directly contacting each inner sidewall of the remaining portion of the diffusion barrier material layer, and a remaining portion of the interconnect metal or metal alloy directly contacting inner sidewalls of each remaining portion of the seed enhancement pre-spacers and directly contacting a horizontal portion of the remaining portion of the diffusion barrier material layer that is located on the bottom wall of the opening.

8. The method of claim 7 , wherein the forming the seed enhancement pre-spacer comprises:

forming a seed enhancement layer on a physically exposed surface of the diffusion barrier material layer, and

performing a spacer etch.

9. The method of claim 8 , wherein the metal or metal alloy that provides the seed enhancement pre-spacer has a resistivity of 15E-8 ohm-meter or less.

10. The method of claim 7 , wherein each the remaining portion of the seed enhancement pre-spacer comprises an I-shaped seed enhancement spacer that has a topmost surface that is coplanar with a topmost surface of the remaining portion of the diffusion barrier material layer and a topmost surface of the remaining portion of the interconnect metal or metal alloy.

11. The method of claim 7 , further comprising forming a dielectric cap layer after the removing the portions of the interconnect metal or metal alloy, the seed enhancement pre-spacers and the diffusion barrier material layer outside the opening.

12. The method of claim 7 , further comprising forming another interconnect structure above the interconnect structure embedded in the interconnect dielectric material layer.

13. The method of claim 12 , wherein the forming the another interconnect structure comprises:

providing another interconnect dielectric material layer located above the interconnect structure embedded in the interconnect dielectric material layer, the another interconnect dielectric material layer contains another opening that physically exposes a surface of the interconnect structure;

forming another diffusion barrier material layer in the another opening and on a topmost surface of the another interconnect dielectric material layer,

forming another seed enhancement pre-spacer directly contacting each inner sidewall of the another diffusion barrier material layer;

forming another interconnect metal or metal alloy on physically exposed surfaces of the another seed enhancement pre-spacers and the another diffusion barrier material layer, wherein the forming of the another interconnect metal or metal alloy comprises another reflow anneal, and wherein the another seed enhancement pre-spacer comprises another metal or metal alloy that facilitates movement of the another interconnect metal or metal alloy during the another reflow anneal; and

removing portions of the another interconnect metal or metal alloy, the another seed enhancement pre-spacers and the another diffusion barrier material layer outside the another opening.