IP Library Granted Patent US 10,541,009
Granted Patent B2
US 10,541,009 · App. 15/857,349 · Granted Jan 21, 2020

Write data mask for power reduction

Inventors: David J. Zimmerman (El Dorado Hills, CA); Robert M. Ellis (Hillsboro, OR); Rajesh Sundaram (Folsom, CA)
Assignee: Intel Corporation
G11C7/1009G06F3/061G06F3/0658G06F3/0688
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Quick Facts
Patent No.
US 10,541,009
App. No.
15/857,349
Granted
Jan 21, 2020
Kind
B2
Abstract

Devices, systems, and methods having increased efficiency selective writing to memory are disclosed and described. A memory controller, upon receiving a dirty data segment, performs a read-modify-write to retrieve a corresponding data line from memory, saves a copy of the data line, merges the dirty data segment into the appropriate location in the data line to create a modified data line, and generates a write mask from the modified data line and the copy of the data line.

Claims (85)

1. A memory apparatus, comprising:

a memory controller to:

receive a dirty data segment from a host;

initiate a read-modify-write (RMW) operation to retrieve a RMW data line having a data segment corresponding to the dirty data segment from a write-in-place non-volatile memory (NVM);

create a copy of the RMW data line;

replace the data segment of the RMW data line with the dirty data segment to create a modified data line;

generate a write mask from the modified data line and the copy of the data line; and

send the modified data line, a write request, and the write mask to the NVM to write only bits that have been altered in the dirty data segment.

2. The apparatus of claim 1 , further comprising:

a write data buffer (WDB) coupled to the memory controller, wherein the memory controller is further to:

store the RMW data line in an entry of the WDB; and

store the dirty data segment in the entry of the WDB to overwrite the data segment to create the modified data line.

3. The apparatus of claim 2 , further comprising:

a RMW buffer communicatively coupled to the WDB and to the memory controller, wherein the memory controller is further to:

store the copy of the RMW data line in the RMW buffer, wherein the write mask is generated from the modified data line in the WDB and the copy of the RMW data line in the RMW buffer.

4. The apparatus of claim 2 , wherein the memory controller is further to store the copy of the RMW data line in the WDB.

5. The apparatus of claim 2 , wherein the memory controller is further to:

maintain the modified data line in the entry of the WDB according to an eviction policy; and

evict the modified data line upon the occurrence of an eviction criterion of the eviction policy.

6. The apparatus of claim 5 , wherein the memory controller is further to:

receive a subsequent dirty data segment from the host;

determine that the modified data line includes a subsequent data segment corresponding to the subsequent dirty data segment;

overwrite the subsequent data segment with the subsequent dirty data segment to incorporate the subsequent dirty data segment in the modified data line; and

send, upon eviction from the WDB, the modified data line, the write mask, and the write request to the NVM to write only bits that have been altered in the dirty data segment and the subsequent dirty data segment.

7. The apparatus of claim 1 , wherein, to send the modified data line, the write request, and the write mask, the memory controller is further to:

send the modified data line, the write request, and the write mask to a media controller at the NVM, where, according to the write mask, only bit lines corresponding to altered bits are driven by the media controller.

8. A memory system, comprising:

a write-in-place non-volatile memory (NVM);

a write data buffer (WDB); and

a memory controller communicatively coupled to the NVM and the WDB, the memory controller to:

receive a dirty data segment from a host;

initiate a read-modify-write (RMW) operation to retrieve a RMW data line having a data segment corresponding to the dirty data segment from the NVM;

create a copy of the RMW data line;

replace the data segment of the RMW data line with the dirty data segment to create a modified data line;

generate a write mask from the modified data line and the copy of the RMW data line; and

send the modified data line, a write request, and the write mask to the NVM to write only bits that have been altered in the dirty data segment.

9. The system of claim 8 , wherein the memory controller is further to:

store the RMW data line in an entry of the WDB; and

store the dirty data segment in the entry of the WDB to overwrite the data segment to create the modified data line.

10. The system of claim 9 , further comprising:

a RMW buffer communicatively coupled to the WDB, wherein the memory controller is further to:

store the copy of the RMW data line in the RMW buffer, wherein the write mask is generated from the modified data line in the WDB and the copy of the RMW data line in the RMW buffer.

11. The system of claim 9 , wherein the memory controller is further to store the copy of the RMW data line in the WDB.

12. The system of claim 9 , wherein the memory controller is further to:

maintain the modified data line in the entry of the WDB according to an eviction policy; and

evict the modified data line upon the occurrence of an eviction criterion of the eviction policy.

13. The system of claim 12 , wherein the memory controller is further to:

receive a subsequent dirty data segment from the host;

determine that the modified data line includes a subsequent data segment corresponding to the subsequent dirty data segment;

overwrite the subsequent data segment with the subsequent dirty data segment to incorporate the subsequent dirty data segment in the modified data line; and

send, upon eviction from the WDB, the modified data line, the write mask, and the write request to the NVM to write only bits that have been altered in the dirty data segment and the subsequent dirty data segment.

14. The system of claim 8 , wherein, to send the modified data line, the write request, and the write mask, the memory controller is further to:

send the modified data line, the write request, and the write mask to a media controller at the NVM, where, according to the write mask, only bit lines corresponding to altered bits are driven by the media controller.

15. The system of claim 8 , wherein the NVM is three-dimensional (3D) cross-point array memory.

16. A method of increasing efficiency of selective writing to memory, comprising:

receiving, at a memory controller, a dirty data segment from a host;

initiating, from the memory controller, a read-modify-write (RMW) operation to retrieve, from a write-in-place non-volatile memory (NVM), a RMW data line having a data segment corresponding to the dirty data segment;

creating, in the memory controller, a copy of the RMW data line;

replacing, in the memory controller, the data segment of the RMW data line with the dirty data segment to create a modified data line;

generating, in the memory controller, a write mask from the modified data line and the copy of the RMW data line;

sending, to the NVM, the modified data line, a write request, and the write mask; and

writing, to the NVM, only bits that have been altered in the dirty data segment.

17. The method of claim 16 , further comprising:

storing, in an entry of a write data buffer (WDB) in the memory controller, the RMW data line; and

storing the dirty data segment in the entry of the WDB to overwrite the data segment to create the modified data line.

18. The method of claim 17 , further comprising:

storing, in a RMW buffer of the memory controller, the copy of the RMW data line; and

generating the write mask from the modified data line in the WDB and the copy of the RMW data line in the RMW buffer.

19. The method of claim 17 , further comprising:

storing the copy of the RMW data line in the WDB; and

generating the write mask from the modified data line in the WDB and the copy of the RMW data line in the WDB.

20. The method of claim 17 , further comprising:

maintaining the modified data line in the entry of the WDB according to an eviction policy; and

evicting the modified data line upon the occurrence of an eviction criterion of the eviction policy.

21. The method of claim 20 , further comprising:

receiving a subsequent dirty data segment from the host;

determining that the modified data line includes a subsequent data segment corresponding to the subsequent dirty data segment;

overwriting the subsequent data segment with the subsequent dirty data segment to incorporate the subsequent dirty data segment into the modified data line;

sending, upon eviction from the WDB, the modified data line, the write mask, and the write request to the NVM; and

writing, to the NVM, only bits that have been altered in the dirty data segment and the subsequent dirty data segment.

22. The method of claim 20 , wherein the eviction criterion can include an event selected from the group consisting of a timeout, a WDB full state, all segments of the data line are dirty, a pre-scheduled order, a random order, and a sequential order.

23. The method of claim 16 , wherein, to send the modified data line, the write request, and the write mask, the method further comprises:

sending the modified data line, the write request, and the write mask to a media controller at the NVM;

activating, by the media controller, only bit lines of the NVM corresponding to altered bits in the dirty data segment according to the write mask; and

writing, by the media controller on the activated bit lines, only the altered bits of the dirty data segment to the NVM.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072890/0186 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2018
From: ZIMMERMAN, DAVID J.; ELLIS, ROBERT M.; SUNDARAM, RAJESH
To: INTEL CORPORATION
Reel/Frame 045049/0685 →
Continuity (1)
Related Publication 20190035437A1 · Jan 31, 2019
Cited By (1)
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