IP Library Granted Patent US 10,964,532
Granted Patent B2
US 10,964,532 · App. 15/857,920 · Granted Mar 30, 2021

Methods of forming semiconductor devices comprising silicon nitride on high aspect ratio features

Inventors: Sumeet C. Pandey (Boise, ID); Brenda D. Kraus (Boise, ID); Stefan Uhlenbrock (Boise, ID); John A. Smythe (Boise, ID); Timothy A. Quick (Boise, ID)
Assignee: Micron Technology, Inc.
H01L21/0228H01L21/0217H01L21/0234H01L21/02211H01L21/02219H01L21/02312
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Quick Facts
Patent No.
US 10,964,532
App. No.
15/857,920
Granted
Mar 30, 2021
Kind
B2
Abstract

Methods of forming silicon nitride. Silicon nitride is formed on a substrate by atomic layer deposition at a temperature of less than or equal to about 275° C. The as-formed silicon nitride is exposed to a plasma. The silicon nitride may be formed as a portion of silicon nitride and at least one other portion of silicon nitride. The portion of silicon nitride and the at least one other portion of silicon nitride may be exposed to a plasma treatment. Methods of forming a semiconductor structure are also disclosed, as are semiconductor structures and silicon precursors.

Claims (32)

1. A method of forming a semiconductor device, comprising:

forming at least one feature on a material, the at least one feature having an aspect ratio of greater than about 10:1 and comprising a different material than the material on which the at least one feature is formed;

contacting the at least one feature with a silicon precursor and a nitrogen precursor at a temperature of less than or equal to about 275° C. and in the absence of a plasma to form silicon monolayers and nitrogen monolayers on the at least one feature; and

exposing the silicon monolayers and the nitrogen monolayers to a plasma to form silicon nitride on the at least one feature, the silicon nitride comprising a substantially uniform thickness along a length thereof and exhibiting a step coverage of greater than about 85%.

2. The method of claim 1 , wherein forming at least one feature on a material comprises forming the at least one feature from a material selected from the group consisting of a chalcogenide material, an organic material, a carbon allotrope, a reactive metal material, and a combination thereof.

3. The method of claim 1 , wherein exposing the silicon monolayers and the nitrogen monolayers to a plasma to form silicon nitride on the at least one feature comprises forming the silicon nitride at a step coverage of greater than about 90%.

4. The method of claim 1 , wherein exposing the silicon monolayers and the nitrogen monolayers to a plasma to form silicon nitride on the at least one feature comprises forming the silicon nitride on the at least one feature having an aspect ratio of about 12:1.

5. The method of claim 1 , wherein exposing the silicon monolayers and the nitrogen monolayers to a plasma to form silicon nitride on the at least one feature comprises forming the silicon nitride on the at least one feature having an aspect ratio of about 15:1.

6. The method of claim 1 , wherein forming at least one feature on a material comprises forming the at least one feature comprising a thermally sensitive material.

7. The method of claim 1 , wherein forming at least one feature on a material comprises forming the at least one feature comprising one or more materials.

8. The method of claim 1 , wherein contacting the at least one feature with a silicon precursor and a nitrogen precursor at a temperature of less than or equal to about 275° C. comprises contacting the at least one feature with the silicon precursor and the nitrogen precursor at a temperature of less than or equal to about 250° C.

9. The method of claim 1 , wherein:

forming at least one feature on a material comprises forming the at least one feature from a material comprising a chalcogenide material, an organic material, a carbon allotrope, a reactive metal, and combinations thereof; and

exposing the silicon monolayers and the nitrogen monolayers to a plasma to form silicon nitride on the at least one feature comprises forming the silicon nitride directly contacting the at least one feature along an entire length thereof,

the semiconductor device comprising at least one transistor, memory, logic device, or memory array.

10. The method of claim 9 , wherein the semiconductor device comprises a dynamic random access memory (DRAM) device, a not or (NOR) Flash memory device, or a three-dimensional cross-point memory device.

11. A method of forming a semiconductor device, comprising:

forming at least one feature on a material, the at least one feature having an aspect ratio of greater than about 10:1 and comprising one or more feature materials, the one or more feature materials comprising a different material than the material on which the at least one feature is formed;

contacting the at least one feature with a silicon precursor and a nitrogen precursor at a temperature of from about 200° C. to about 250° C. and in the absence of a plasma to form silicon monolayers and nitrogen monolayers on the at least one feature; and

exposing the silicon monolayers and the nitrogen monolayers to a plasma to form silicon nitride on the at least one feature, the silicon nitride comprising a substantially uniform thickness along a length thereof.

12. The method of claim 11 , wherein forming silicon nitride on the at least one feature comprises forming the silicon nitride comprising a thickness of from about 30 Å to about 1000 Å.

13. The method of claim 11 , wherein forming silicon nitride on the at least one feature comprises forming the silicon nitride at a step coverage of greater than about 95%.

14. The method of claim 11 , wherein forming silicon nitride on the at least one feature comprises forming the silicon nitride comprising Si 3 N 4 , Si x N y , or Si(CH) x N y , where each of x and y is independently a rational number from about 0.5 to about 2.0.

15. The method of claim 11 , wherein forming silicon nitride on the at least one feature comprises forming the silicon nitride in direct contact with sidewalls of the at least one feature.

16. The method of claim 11 , wherein forming silicon nitride on the at least one feature comprises forming at least a portion of the silicon nitride by atomic layer deposition.

17. The method of claim 11 , wherein forming silicon nitride on the at least one feature comprises forming the silicon nitride directly contacting sidewalls of the at least one feature along an entire length thereof.

18. The method of claim 11 , wherein exposing the silicon monolayers and the nitrogen monolayers to a plasma to form silicon nitride on the at least one feature comprises forming the silicon monolayers and nitrogen monolayers to a desired thickness before exposing the silicon monolayers and the nitrogen monolayers to the plasma.

19. A method of forming a semiconductor device, comprising:

forming at least one feature on a material, the at least one feature having an aspect ratio of greater than about 10:1 and comprising a different material than the material on which the at least one feature is formed;

forming silicon nitride on the at least one feature by atomic layer deposition at a temperature of less than or equal to about 250° C. and in the absence of a plasma, the silicon nitride directly contacting the at least one feature and the silicon nitride comprising a substantially uniform thickness along a length thereof; and

exposing the silicon nitride to a plasma after forming the silicon nitride to a desired thickness.

20. The method of claim 19 , wherein forming silicon nitride on the at least one feature by atomic layer deposition comprises forming the silicon nitride by contacting a silicon precursor and a nitrogen precursor with the at least one feature, the silicon precursor comprising a brominated silane, an iodinated silane, a silylene compound, or combinations thereof.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050716/0678 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 7 TO PATENT SECURITY AGREEMENT Recorded Feb 6, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 045267/0833 →
Continuity (2)
Division 15235365 · Aug 12, 2016
Related Publication 20180144927A1 · May 24, 2018