Cell-based reference voltage generation
View Patent ↗Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be initialized to a first state and a second ferroelectric memory cell may be initialized to a different state. Each state may have a corresponding digit line voltage. The digit lines of the first and second ferroelectric memory cells may be connected so that charge-sharing occurs between the two digit lines. The voltage resulting from the charge-sharing between the two digit lines may be used by other components as a reference voltage.
1. An electronic memory apparatus, comprising:
a first capacitor;
a second capacitor;
a first voltage source in electronic communication with the first capacitor;
a second voltage source in electronic communication with the second capacitor, the second voltage source being different than the first voltage source; and
a controller operable to:
couple the first capacitor with the first voltage source;
couple the second capacitor with the second voltage source;
determine a first voltage of the first capacitor and a second voltage of the second capacitor based at least in part on coupling the first capacitor with the first voltage source and coupling the second capacitor with the second voltage source, and
store a reference voltage that is based at least in part on the first voltage and the second voltage.
2. The electronic memory apparatus of claim 1 , further comprising:
a first switching component in electronic communication the first capacitor, the second capacitor, and the controller; and
a second switching component in electronic communication with the first capacitor, the second capacitor, and the controller, wherein the controller is operable to:
activate the first switching component and the second switching component, wherein the reference voltage is stored based at least in part on activating the first and second switching components.
3. The electronic memory apparatus of claim 1 , wherein the controller is further operable to:
detect a trigger condition; and
activate a first selection component in electronic communication with the first capacitor and the first voltage source and a second selection component in electronic communication with the second capacitor and the second voltage source is based at least in part on detecting the trigger condition.
4. The electronic memory apparatus of claim 3 , wherein the trigger condition comprises at least one of a temperature change, a timer expiration, an operation threshold, or an error correction code (ECC) event.
5. The electronic memory apparatus of claim 1 , further comprising:
an analog-to-digital converter in electronic communication with a first digit line of the first capacitor and a second digit line of the second capacitor, wherein the controller is operable to:
store an output of the analog-to-digital converter as the reference voltage.
6. An electronic memory apparatus, comprising:
an array of memory cells including a first memory cell and a second memory cell, wherein the first memory cell and the second memory cell are each configured to store at least a portion of a reference voltage signal; and
a controller in electronic communication with the first memory cell and the second memory cell, the controller being operable to:
identify a first portion of the reference voltage signal and a second portion of the reference voltage signal used during a read operation associated with the array of memory cells;
store the first portion of the reference voltage signal on the first memory cell; and
store the second portion of the reference voltage signal on the second memory cell.
7. The electronic memory apparatus of claim 6 , wherein the reference voltage signal is based at least in part on a voltage difference between the first portion stored on the first memory cell and the second portion stored on the second memory cell.
8. The electronic memory apparatus of claim 6 , wherein the controller is further operable to:
couple the first memory cell to a first voltage source, wherein storing the first portion of the reference voltage signal on the first memory cell is based at least in part on coupling the first memory cell to the first voltage source.
9. The electronic memory apparatus of claim 8 , wherein the controller is further operable to:
couple the second memory cell to a second voltage source different from the first voltage source, wherein storing the second portion of the reference voltage signal on the second memory cell is based at least in part on coupling the second memory cell to the second voltage source.
10. The electronic memory apparatus of claim 9 , wherein at least one of the first voltage source or the second voltage source is a virtual ground.
11. The electronic memory apparatus of claim 9 , further comprising:
a first switching component to selectively couple the first memory cell to a first digit line; and
a second switching component to selectively couple the first voltage source to the first digit line, wherein coupling the first memory cell to the first voltage source is based at least in part on activating the first switching component and the second switching component.
12. The electronic memory apparatus of claim 9 , further comprising:
a third switching component to selectively couple the second memory cell to a second digit line; and
a fourth switching component to selectively couple the second voltage source to the second digit line, wherein coupling the second memory cell to the second voltage source is based at least in part on activating the third switching component and the fourth switching component.
13. The electronic memory apparatus of claim 6 , wherein the controller is further operable to:
determine whether a refresh condition associated with the reference voltage signal satisfies a threshold, wherein identifying the first portion and the second portion of the reference voltage signal is based at least in part on determining whether the refresh condition satisfies the threshold.
14. The electronic memory apparatus of claim 13 , wherein the controller is further operable to:
store the second portion of the reference voltage signal on the first memory cell based at least in part on the threshold being satisfied; and
store the first portion of the reference voltage signal on the second memory cell based at least in part on the threshold being satisfied.
15. The electronic memory apparatus of claim 13 , wherein the refresh condition and the threshold are based at least in part on a temperature of the first memory cell and a temperature of the second memory cell, or a timer, or a number of access operations performed by the array of memory cells, or an error correction code (ECC) event, or a combination thereof.
16. An electronic memory apparatus, comprising:
an array of memory cells including a first memory cell and a second memory cell, wherein the first memory cell and the second memory cell are configured to store at least a portion of a reference voltage signal; and
a controller operable to:
apply a first voltage on a first digit line;
apply a second voltage on a second digit line, wherein the second voltage is different from the first voltage;
couple the first digit line with the second digit line based at least in part on applying the first voltage and the second voltage; and
generate a reference voltage based at least in part on coupling the first digit line with the second digit line.
17. The electronic memory apparatus of claim 16 , wherein the reference voltage is based at least in part on a voltage difference between the first voltage and the second voltage.
18. The electronic memory apparatus of claim 16 , wherein the controller is further operable to:
determine a logic state stored on a memory cell based at least in part on the reference voltage.
19. The electronic memory apparatus of claim 16 , wherein the controller is further operable to:
activate one or more switching components that are in electronic communication with the first digit line and the second digit line, wherein coupling the first digit line with the second digit line is based at least in part on activating the one or more switching components.
20. The electronic memory apparatus of claim 16 , wherein the controller is further operable to:
couple the first memory cell with the first digit line and the second memory cell with the second digit line, wherein applying the first voltage and the second voltage is based at least in part on coupling the first memory cell with the first digit line and coupling the second memory cell with the second digit line.