Methods and apparatus for an image sensor with a multi-branch transistor
Various embodiments of the present technology may comprise a method and device for a multi-branch transistor for use in an image sensor. The device may comprise an active region, wherein the active region comprises three doped regions. At least two of the three doped region may be floating diffusion active regions, wherein each floating diffusion active region is connected to a single photosensitive element or multiple photosensitive elements. The device may comprise a multi-branch channel region defined by the area underlying a gate region and substantially surrounded by the doped regions.
1. A solid-state imaging device, comprising:
a first pixel comprising a photosensitive element; and
a transistor coupled to the first pixel, comprising:
a multi-branch channel region comprising:
a first branch;
a second branch; and
a third branch;
a first doped region adjacent to the first branch;
a second doped region adjacent to the second branch; and
a third doped region adjacent to the third branch;
wherein at least one of the doped regions comprises a floating diffusion active region.
2. The solid-state imaging device of claim 1 , wherein the multi-branch channel region is substantially T-shaped.
3. The solid-state imaging device of claim 1 , wherein:
the first doped region comprises a first floating diffusion active region;
the second doped region comprises a second floating diffusion active region; and
the first doped region is electrically connected to the second doped region.
4. The solid-state imaging device of claim 1 , wherein the third doped region is connected to a supply voltage.
5. The solid-state imaging device of claim 1 , wherein the third doped region comprises a third floating diffusion active region.
6. The solid-state imaging device of claim 1 , wherein the first pixel is coupled to at least one of the doped regions.
7. The solid-state imaging device of claim 1 , wherein the first pixel is coupled to at least two of the doped regions.
8. The solid-state imaging device of claim 1 , wherein the transistor further comprises a gate region overlaying the multi-branch channel region.
9. The solid-state imaging device of claim 8 , wherein the gate region comprises a solid layer of polysilicon.
10. The solid-state imaging device of claim 1 , further comprising a second pixel coupled to at least one of the doped regions.
11. A solid-state imaging device, comprising:
a pixel comprising a photosensitive element; and
a multi-branch transistor coupled to the pixel, comprising:
a first doped region;
a second doped region; and
a third doped region;
wherein:
at least one of the doped regions comprises a floating diffusion active region; and
the pixel is coupled to at least one of the doped regions.
12. The solid-state imaging device of claim 11 , further comprising a multi-branch channel region positioned central to the doped regions.
13. The solid-state imaging device of claim 11 , further comprising a gate region overlaying the multi-branch channel region, and wherein the gate region comprises a solid layer of polysilicon.
14. The solid-state imaging device of claim 11 , wherein at least one of the doped regions is connected to a supply voltage.
15. The solid-state imaging device of claim 11 , wherein:
the first doped region comprises a first floating diffusion active region;
the second doped region comprises a second floating diffusion active region; and
the first doped region is electrically connected to the second doped region.
16. A solid-state imaging device, comprising:
a plurality of pixels;
a transistor coupled to at least one pixel and comprising:
a multi-branch channel region comprising at least three branches; and
a plurality of doped regions;
wherein:
each one of the doped regions is adjacent to one of the branches;
at least one of the doped regions comprises a floating diffusion active region.
17. The solid-state imaging device of claim 16 , wherein:
a first doped region comprises a first floating diffusion action region;
a second doped region comprises a second floating diffusion region;
a third doped region is electrically connected to a supply voltage; and
the first doped region is electrically connected to the second doped region.
18. The solid-state imaging device of claim 16 , wherein:
a first doped region comprises a first floating diffusion action region;
a second doped region comprises a second floating diffusion region;
a third doped region comprises a third floating diffusion region; and
at least one of the doped regions is connected to a capacitor.
19. The solid-state imaging device of claim 16 , wherein the multi-branch channel region is positioned central and adjacent to the doped regions, and wherein the multi-branch channel region is substantially T-shaped.
20. The solid-state imaging device of claim 19 , wherein the transistor further comprises a gate region overlaying the multi-branch channel region, and wherein the gate region comprises a solid layer of polysilicon.