Semiconductor devices including stair-step structures
View Patent ↗Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material, forming a first mask over the sets, forming a first number of contact regions, forming a second mask over a first region of the sets, and removing material from the sets in a second, exposed region laterally adjacent the first region to form a second number of contact regions. Another method includes forming first and second contact regions on portions of sets of conductive materials and insulating materials, each of the second contact regions more proximal to an underlying substrate than each of the first contact regions. Apparatuses such as memory devices including laterally adjacent first and second regions each of which including contact regions of a different portion of a plurality of conductive materials and related methods of forming such devices are also disclosed.
1. A semiconductor device comprising an array region and a stair-step region, the stair-step region comprising:
a stair-step structure comprising sets of conductive material and insulative material, the sets of conductive material and insulative material comprising:
a first group of sets of the conductive material and insulative material, the first group comprising first contact regions;
a second group of sets of the conductive material and insulative material, the second group comprising second contact regions;
a third group of sets of the conductive material and insulative material, the third group comprising third contact regions; and
a fourth group of sets of the conductive material and insulative material, the fourth group comprising fourth contact regions, wherein the contact regions of each of the first group, the second group, the third group, and the fourth group are vertically offset from the contact regions of the other of the first group, the second group, the third group, and the fourth group relative to a lowermost set of the sets of conductive material and insulative material, wherein the second group and the third group are located between the first group and the fourth group, and wherein the second contact regions and the third contact regions are located farther from the lowermost set than the first contact regions and the fourth contact regions; and
another stair-step structure laterally adjacent the stair-step structure.
2. The semiconductor device of claim 1 , wherein the first group of sets of the conductive material and insulative material comprises about one-fourth a number of the sets of conductive material and insulative material.
3. The semiconductor device of claim 1 , wherein all of the first contact regions of the first group of sets are located closer to the lowermost set than all of the second contact regions of the second group of sets.
4. The semiconductor device of claim 1 , wherein the another stair-step structure is separated from the stair-step structure by a void.
5. The semiconductor device of claim 1 , wherein the another stair-step structure exhibits substantially the same structure as the stair-step structure.
6. A semiconductor device, comprising:
a first stair-step structure comprising sets of conductive material and insulative material, each set comprising a conductive material and an insulative material, the stair-step structure including a first region of stair-steps and a second region of stair steps, the first region extending from an uppermost stair-step to a lowermost stair-step in a first direction, the steps of the first region vertically offset from one another by two sets and the steps of the second region vertically offset from one another by two sets, each step of the second region vertically offset from a corresponding step of the first region by one step, at least some steps of the second region vertically located between two steps of the first region; and
a second stair-step structure laterally adjacent to the first stair-step structure.
7. The semiconductor device of claim 6 , wherein the second stair-step structure exhibits substantially the same shape and size as the first stair-step structure.
8. The semiconductor device of claim 6 , wherein an uppermost step of the first region of stair-steps is farther from a lowermost set of the sets of conductive material and insulative material than all but an uppermost step of the second region of stair-steps.
9. The semiconductor device of claim 6 , further comprising conductive contacts in contact with all of the steps the first stair-step structure.
10. The semiconductor device of claim 6 , wherein the second stair-step structure is laterally adjacent the first stair-step structure.
11. The semiconductor device of claim 1 , wherein the stair-step structure comprises sixteen steps.
12. The semiconductor device of claim 1 , wherein the another stair-step structure comprises the same number of sets of conductive material and insulative material.
13. The semiconductor device of claim 1 , wherein the another stair-step structure comprises a same number of stair-steps as the stair-step structure.
14. The semiconductor device of claim 1 , wherein stair-steps of the another stair-step structure are coplanar with stair-steps of the stair-step structure.