Plasma processing apparatus and method, and method of manufacturing semiconductor device using the same

1. A plasma processing method, comprising:

applying a plasma generating power output to an upper electrode, to form plasma within a chamber;

applying a first bias power output having a sinusoidal voltage waveform to a substrate electrode within the chamber to perform a first etch stage on an object layer on a substrate within the chamber, to form a first opening in the object layer; and

applying a second bias power output having a nonsinusoidal voltage waveform to the substrate electrode to perform a second etch stage on the first opening in the object layer on the substrate, to form a second opening in the object layer until an underlying layer is exposed,

wherein the nonsinusoidal voltage waveform of the second bias power output comprises a periodic waveform having a DC pulse portion and a ramp portion,

wherein applying the first bias power output to the substrate electrode comprises generating ion energy of a first level on a surface of the substrate, and applying the second bias power output to the substrate electrode comprises generating ion energy of a second level less than the first level on the surface of the substrate,

wherein when the second bias power output is applied to the substrate electrode, an ion energy distribution having one peak value is generated on the surface of the semiconductor substrate,

performing the first and second etch stages comprises processing the substrate at a first preset temperature during a first period and processing the substrate at a second preset temperature during a second period respectively, and

wherein the second preset temperature is greater than the first preset temperature.

2. The method of claim 1 , wherein the ramp portion has a waveform which declines gradually over time while decreasing from a maximum of the DC pulse portion to a minimum of the DC pulse portion.

3. The method of claim 1 , wherein applying the second bias power output to the substrate electrode comprises applying a compensation current to the substrate electrode to modify the DC pulse portion of the nonsinusoidal voltage waveform.

4. The method of claim 1 , further comprising

adjusting a power applied to a heater using a heater power supply to increase a temperature of an electrostatic chuck to a preset temperature, the electrostatic chuck supporting the substrate; and

blocking components of the first and second bias power outputs from being transferred to the heater power supply by using a filter installed between the heater and the heater power supply.

5. The method of claim 1 , further comprising introducing process gases having a predetermined mixture ratio onto the substrate.

6. A method of manufacturing a semiconductor device, comprising:

applying a plasma generating power output to an upper electrode, to form plasma within a chamber;

applying a first bias power output having a sinusoidal voltage waveform to a substrate electrode within the chamber and etching an object layer on a semiconductor substrate within the chamber until an underlying buffer portion remains, to form a preliminary pattern in the object layer; and

applying a second bias power output having a nonsinusoidal voltage waveform to the substrate electrode and etching the preliminary pattern in the object layer to remove the underlying buffer portion until an underlying layer is exposed and form an object layer pattern,

wherein the nonsinusoidal voltage waveform of the second bias power output comprises a periodic waveform having a DC pulse portion and a ramp portion,

wherein applying the first bias power output to the substrate electrode comprises generating first ion energy on a surface of the semiconductor substrate, and applying the second bias power output to the substrate electrode comprises generating second ion energy less than the first ion energy on the surface of the semiconductor substrate,

wherein when the second bias power output is applied to the substrate electrode, an ion energy distribution having one peak value is generated on the surface of the semiconductor substrate,

wherein etching the object layer is performed at a first preset temperature during a first period and etching the preliminary pattern in the object layer is performed at a second preset temperature during a second period, and

wherein the second preset temperature is greater than the first preset temperature.

7. The method of claim 6 , further comprising forming a photoresist pattern on the object layer, and

wherein etching the object layer comprises using the photoresist pattern as an etching mask.