IP Library Granted Patent US 10,453,886
Granted Patent B2
US 10,453,886 · App. 15/875,259 · Granted Oct 22, 2019

Semiconductor apparatus, method of manufacturing semiconductor apparatus, method of designing semiconductor apparatus, and electronic apparatus

Inventors: Hiroshi Takahashi (Kanagawa, JP); Shunichi Sukegawa (Kanagawa, JP); Keishi Inoue (Kanagawa, JP)
Assignee: Sony Corporation
H01L27/14634H01L21/76802H01L21/76898H01L23/481H01L27/1464H01L27/1469H01L27/14621H01L27/14627H01L27/14632H01L27/14636H01L27/14638H01L27/14645H01L31/02002H04N5/379H01L23/5283H01L23/535H01L24/05H01L31/02008H01L31/02013H01L2224/02166H01L2224/04042H01L2224/08145H01L2224/24147H01L2224/48463H01L2224/80896H01L2224/9202H01L2224/9212H01L2924/12043H01L2924/1306H01L2924/13091H01L2924/14H01L2924/3025
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Quick Facts
Patent No.
US 10,453,886
App. No.
15/875,259
Granted
Oct 22, 2019
Kind
B2
Abstract

A semiconductor device including a first material layer adjacent to a second material layer, a first via passing through the first material layer and extending into the second material layer, and a second via extending into the first material layer, where along a common cross section parallel to an interface between the two material layers, the first via has a cross section larger than that of the second via.

Claims (12)

1. A method of manufacturing a semiconductor device, the method including the steps of:

forming a first material layer with a first surface and a second surface;

forming a first insulating layer in the first material layer;

forming a second material layer with a first surface and a second surface;

forming a second insulating layer in the second material layer;

securing the second surface of the first material layer against the first surface of the second material layer; and

forming a first via and a second via simultaneously, wherein along a common cross section parallel to an interface between the two material layers the first via has a cross section larger than that of the second via, wherein the first via extends into the second insulating layer in the second material layer, and wherein the second via extends into the first insulating layer in the first material layer.

2. The method of claim 1 wherein the first via and the second via are filled with a conductive material.

3. The method of claim 1 wherein the first via reaches a second interconnect in the second insulating layer in the second material layer.

4. The method of claim 1 wherein the second via reaches a first interconnect in the first insulating layer in the first material layer.

5. The method of claim 1 further including the step of forming an on chip lens over a photodiode of the semiconductor device.

6. The method of claim 5 , further including the step of forming an on chip color filter between the photodiode and the on chip lens.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2021
From: TAKAHASHI, HIROSHI; SUKEGAWA, SHUNICHI; INOUE, KEISHI
To: SONY CORPORATION
Reel/Frame 056528/0215 →
Priority Claims (1)
JP 2010-070925 · Mar 25, 2010 · national
Continuity (6)
Continuation 15335320 · Oct 26, 2016
Continuation 14995072 · Jan 13, 2016
Continuation 14587800 · Dec 31, 2014
Continuation 13962711 · Aug 8, 2013
Continuation 13050338 · Mar 17, 2011
Related Publication 20180158859A1 · Jun 7, 2018
Cited By (2)
US 12,266,674 US 12,653,030