Extended drain metal-oxide-semiconductor transistor
Devices and methods for forming a device are disclosed. A substrate is provided. A first body well of a second polarity type is formed in the substrate. A second body well of the second polarity type is formed in the first body well. A bottom of the second body well and a bottom of the first body well are contiguous. Dopant concentrations of the first and second body wells include a graded profile. A transistor of a first polarity type is formed over the substrate. The transistor includes a source and a drain. The source is formed in the second body well.
1. A device comprising:
a substrate;
a uniformly doped first body well disposed in the substrate;
a uniformly doped second body well disposed in the first body well, wherein a bottom of the second body well and a bottom of the first body well are contiguous, and wherein the second body well has a lower dopant concentration than the first body well; and
a transistor disposed over the substrate, wherein the transistor comprises a gate, a source and a drain, and wherein the source is formed in the second body well and is heavily doped with dopants having a larger mass than the dopants of the second body well to produce a box like dopant profile.
2. The device of claim 1 wherein the first body well is doped with second polarity type dopants.
3. The device of claim 2 wherein the second polarity type dopants comprise boron.
4. The device of claim 1 wherein the second body well is doped with second polarity type dopants.
5. The device of claim 4 wherein the second polarity type dopants comprise BF 2 .
6. The device of claim 1 wherein the gate serves as an implant mask to implant the dopants into the substrate.
7. The device of claim 6 wherein the implant mask comprises a vertical BF 2 implant.
8. The device of claim 1 wherein the transistor is a first polarity type transistor.
9. The device of claim 8 wherein the dopants having the larger mass are first polarity type dopants comprising arsenic (As).
10. The device of claim 1 wherein the drain and source are asymmetrical doped region.
11. The device of claim 10 wherein the depth of the drain is deeper than the depth of the source.
12. The device of claim 1 wherein substrate is a silicon-on-insulator (SOI) substrate and wherein the SOI substrate comprises a surface silicon layer, a buried oxide (BOX) layer and a bulk silicon layer.
13. The device of claim 12 wherein the drain extends from a top surface of the surface silicon layer to the BOX layer, and the source extends from the top surface of the surface silicon layer to a partial thickness of the surface silicon layer.
14. The device of claim 12 wherein the first and second device well extend from a top surface of the surface silicon layer to the BOX layer.
15. The device of claim 1 further comprising a first type drift well disposed in the substrate.
16. The device of claim 1 further comprising a body contact of a second polarity type disposed along a channel direction of the transistor.
17. The device of claim 1 wherein the drain is displaced from the gate.
18. A device comprising:
a substrate;
a uniformly doped first body well disposed in the substrate;
a uniformly doped second body well disposed in the first body well, wherein a bottom of the second body well and a bottom of the first body well are contiguous; and
a transistor over the substrate, wherein the transistor comprises a gate, a source and a drain, and wherein the source
is formed in the second body well,
has a depth of a lightly doped drain (LDD) extension, and
is heavily doped with dopants having a larger mass than the dopants of the second body well to produce a box like dopant profile.
19. The device of claim 18 wherein the first body well is doped with second polarity type dopants, and wherein the second polarity type dopants comprise boron.
20. The device of claim 18 wherein the second body well is doped with second polarity type dopants, and wherein the second polarity type dopants comprise BF 2 .