IP Library › Granted Patent US 10,390,440
Granted Patent B1
US 10,390,440 · App. 15/886,820 · Granted Aug 20, 2019

Solderless inter-component joints

Inventors: Tsung Nan Lo (Kaohsiung, TW); Chung Hsiung Ho (Kaohsiung, TW)
Assignee: NXP B.V.
H05K3/3421B23K20/02H01L23/49816H01L24/03H01L24/05H01L24/11H01L24/13H01L24/16H01L24/81H05K1/111B23K2101/36H05K2201/10636H05K2201/10689
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Quick Facts
Patent No.
US 10,390,440
App. No.
15/886,820
Granted
Aug 20, 2019
Kind
B1
Abstract

In a die-substrate assembly, a copper inter-component joint is formed by bonding corresponding copper interconnect structures together directly, without using solder. The copper interconnect structures have distal layers of (111) crystalline copper that enable them to bond together at a relatively low temperature (e.g., below 300° C.) compared to the relatively high melting point (about 1085° C.) for the bulk copper of the rest of the interconnect structures. By avoiding the use of solder, the resulting inter-component joint will not suffer from the adverse IMC/EM effects of conventional, solder-based joints. The distal surfaces of the interconnect structures may be curved (e.g., one concave and the other convex) to facilitate mating the two structures and improve the reliability of the physical contact between the two interconnect structures. The bonding may be achieved using directed microwave radiation and microwave-sensitive flux, instead of uniform heating.

Claims (26)

1. A method for assembling an article of manufacture, the method comprising:

providing a first electronic component comprising a first metal interconnect structure having a distal layer of crystalline metal;

providing a second electronic component comprising a second metal interconnect structure having a distal layer of crystalline metal;

mating the first and second electronic components such that the distal layer of the first metal interconnect structure contacts the distal layer of the second metal interconnect structure;

applying flux to at least one of the first and second metal interconnect structures, wherein the flux is microwave-sensitive; and

applying heat to bond the first and second metal interconnect structures together to form a metal inter-component joint, wherein the flux is heated using microwave radiation and heat from the flux conductively heats the distal layers of crystalline metal.

2. The method of claim 1 , wherein the first and second metal interconnect structures are copper interconnect structures, and the distal layers of crystalline metal are (111) copper.

3. The method of claim 1 , wherein the distal layers of crystalline metal are formed by electroplating the first and second metal interconnect structures.

4. The method of claim 1 , wherein the first and second metal interconnect structures are bonded together without using any solder.

5. The method of claim 1 , wherein the first and second metal interconnect structures are bonded together by metal diffusion.

6. The method of claim 1 , wherein the microwave radiation is applied as a directed beam from a targeted microwave beam device.

7. The method of claim 1 , wherein the microwave radiation is pulsed to apply the heat.

8. The method of claim 1 , wherein respective cooling plates are applied to the first and second electronic components to inhibit permanent damage to the first and second electronic components.

9. The method of claim 1 , wherein:

one of the first and second metal interconnect structures has a concave distal surface; and

the other of the first and second metal interconnect structures has a convex distal surface.

10. The method of claim 9 , wherein the radius of the concave distal surface is greater than the radius of the convex distal surface.

11. The method of claim 9 , wherein:

the concave distal surface is formed using a foundation design; and

the convex distal surface is formed using a plating solution.

12. The method of claim 1 , wherein the distal layers of crystalline metal are heated to less than 300° C.

13. The method of claim 1 , wherein a compressive force is applied between the first and second electronic components when the heat is applied.

14. The method of claim 1 , wherein a vacuum is applied when the heat is applied.

15. The method of claim 1 , wherein:

the first electronic component is a flip-chip die; and

the second electronic component is a substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2018
From: LO, TSUNG NAN; HO, CHUNG HSIUNG
To: NXP B.V.
Reel/Frame 044826/0056 →
Cited By (1)
US 12,272,665