Solid-state imaging device, manufacturing method thereof, and electronic apparatus
Disclosed herein is a solid-state imaging device including: a laminated semiconductor chip configured to be obtained by bonding two or more semiconductor chip sections to each other and be obtained by bonding at least a first semiconductor chip section in which a pixel array and a multilayer wiring layer are formed and a second semiconductor chip section in which a logic circuit and a multilayer wiring layer are formed to each other in such a manner that the multilayer wiring layers are opposed to each other and are electrically connected to each other; and a light blocking layer configured to be formed by an electrically-conductive film of the same layer as a layer of a connected interconnect of one or both of the first and second semiconductor chip sections near bonding between the first and second semiconductor chip sections. The solid-state imaging device is a back-illuminated solid-state imaging device.
1. A solid-state imaging device comprising:
a first semiconductor substrate including a plurality of pixels and a first multilayer wiring layer having a first connecting interconnect;
a second semiconductor substrate including a logic circuit and a second multilayer wiring layer having a second connecting interconnect, wherein the first semiconductor substrate and the second semiconductor substrate are arranged such that the first multilayer wiring layer and the second multilayer wiring layer face one another and are electrically connected to one another at a bonding surface between the first semiconductor substrate and the second semiconductor substrate; and
an electrically-conductive film layer disposed at the same layer as one of the first connecting interconnect and the second connecting interconnect, and formed across a whole of the bonding surface corresponding to the plurality of pixels,
wherein the first connecting interconnect and the second connecting interconnect are bonded to one another, and
wherein the solid-state imaging device is a back-illuminated solid-state imaging device.
2. The solid-state imaging device according to claim 1 , wherein the electrically-conductive film layer is formed across a whole of the bonding surface corresponding to the logic circuit.
3. The solid-state imaging device according to claim 1 , wherein the first multilayer wiring layer further comprises a first metal wiring, wherein the first metal wiring overlaps with the electrically-conductive film layer.
4. The solid-state imaging device according to claim 3 , wherein the first multilayer wiring layer further comprises an electrically-conductive via between the first connecting interconnect and the first metal wiring.
5. The solid-state imaging device according to claim 1 , wherein a material of the electrically-conductive film layer is selected from the group including Cu, Al, W, Ti, Ta, Mo, Ru, and alloys thereof.
6. The solid-state imaging device according to claim 1 , wherein a film thickness of the electrically-conductive film layer is between 50 and 800 nm.
7. A solid-state imaging device comprising:
a first semiconductor substrate including a plurality of pixels and a first multilayer wiring layer having a first connecting interconnect and a first electrically-conductive film; and
a second semiconductor substrate including a logic circuit and a second multilayer wiring layer having a second connecting interconnect and a second electrically-conductive film,
wherein the first semiconductor substrate and the second semiconductor substrate are arranged such that the first multilayer wiring layer and the second multilayer wiring layer face one another and are electrically connected to one another at a bonding surface between the first semiconductor substrate and the second semiconductor substrate,
wherein the first connecting interconnect and the second connecting interconnect are bonded to one another,
wherein the first electrically-conductive film is disposed at the same layer as the first connecting interconnect, the second electrically-conductive film is disposed at the same layer as the second connecting interconnect, and the first electrically-conductive film and the second electrically-conductive film cover a whole of the bonding surface corresponding to the plurality of pixels, and
wherein the solid-state imaging device is a back-illuminated solid-state imaging device.
8. The solid-state imaging device according to claim 7 , wherein at least a part of the first electrically-conductive film and at least a part of the second electrically-conductive film are bonded to one another.
9. The solid-state imaging device according to claim 7 , wherein the first electrically-conductive film and the second electrically-conductive film cover a whole of the bonding surface corresponding to the logic circuit.
10. The solid-state imaging device according to claim 7 , wherein the first multilayer wiring layer further comprises a first metal wiring, wherein the first metal wiring overlaps with the first electrically-conductive film layer.
11. The solid-state imaging device according to claim 10 , wherein the first multilayer wiring layer further comprises an electrically-conductive via between the first connecting interconnect and the first metal wiring.
12. The solid-state imaging device according to claim 7 , wherein a material of the electrically-conductive film layer is selected from the group including Cu, Al, W, Ti, Ta, Mo, Ru, and alloys thereof.
13. The solid-state imaging device according to claim 7 , wherein a film thickness of the electrically-conductive film layer is between 50 and 800 nm.
14. A solid-state imaging device comprising:
a first semiconductor substrate including a plurality of pixels and a first multilayer wiring layer having a first connecting interconnect and a first electrically-conductive film; and
a second semiconductor substrate including a logic circuit and a second multilayer wiring layer having a second connecting interconnect and a second electrically-conductive film,
wherein the first semiconductor substrate and the second semiconductor substrate are arranged such that the first multilayer wiring layer and the second multilayer wiring layer face one another and are electrically connected to one another at a bonding surface between the first semiconductor substrate and the second semiconductor substrate,
wherein the first connecting interconnect and the second connecting interconnect are bonded to one another,
wherein the first electrically-conductive film is disposed at the same layer as the first connecting interconnect, the second electrically-conductive film is disposed at the same layer as the second connecting interconnect, and the first electrically-conductive film and the second electrically-conductive film cover a whole of the bonding surface corresponding to the plurality of pixels, and
wherein at least a part of the first electrically-conductive film and at least a part of the second electrically-conductive film are bonded to one another.
15. The solid-state imaging device according to claim 14 , wherein the solid-state imaging device is a back-illuminated solid-state imaging device.
16. The solid-state imaging device according to claim 14 , wherein the first electrically-conductive film and the second electrically-conductive film cover a whole of the bonding surface corresponding to the logic circuit.
17. The solid-state imaging device according to claim 14 , wherein the first multilayer wiring layer further comprises a first metal wiring, wherein the first metal wiring overlaps with the first electrically-conductive film layer.
18. The solid-state imaging device according to claim 17 , wherein the first multilayer wiring layer further comprises an electrically-conductive via between the first connecting interconnect and the first metal wiring.
19. The solid-state imaging device according to claim 14 , wherein a material of the electrically-conductive film layer is selected from the group including Cu, Al, W, Ti, Ta, Mo, Ru, and alloys thereof.
20. The solid-state imaging device according to claim 14 , wherein a film thickness of the electrically-conductive film layer is between 50 and 800 nm.