IP Library Granted Patent US 10,825,816
Granted Patent B2
US 10,825,816 · App. 15/898,086 · Granted Nov 3, 2020

Recessed access devices and DRAM constructions

Inventors: Yunfei Gao (Boise, ID); Richard J. Hill (Boise, ID); Gurtej S. Sandhu (Boise, ID); Haitao Liu (Boise, ID); Deepak Chandra Pandey (Boise, ID); Srinivas Pulugurtha (Boise, ID); Kamal M. Karda (Boise, ID)
Assignee: Micron Technology, Inc.
H01L27/10823H01L27/10814H01L27/10826H01L27/10879H01L29/1054H01L29/20H01L29/267H01L29/41783H01L29/4236H01L29/78
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Quick Facts
Patent No.
US 10,825,816
App. No.
15/898,086
Granted
Nov 3, 2020
Kind
B2
Abstract

A recessed access device comprises a conductive gate in a trench in semiconductor material. A gate insulator is along sidewalls and a base of the trench between the conductive gate and the semiconductor material. A pair of source/drain regions is in upper portions of the semiconductor material on opposing sides of the trench. A channel region is in the semiconductor material below the pair of source/drain regions along the trench sidewalls and around the trench base. At least some of the channel region comprises GaP.

Claims (29)

1. A recessed access device comprising:

a conductive gate in a trench in semiconductor material, the conductive gate in a straight-line vertical cross-section having opposing sidewalls and a bottom below and extending between the opposing sidewalls;

a gate insulator between the conductive gate and the semiconductor material, the gate insulator being along the opposing sidewalls and the bottom of the conductive gate in the straight-line vertical cross-section;

a pair of source/drain regions in upper portions of the semiconductor material on opposing sides of the trench in the straight-line vertical cross-section; and

a channel region in the semiconductor material, the channel region having a pair of top surfaces below the pair of source/drain regions in the straight-line vertical cross-section, the channel region being below the pair of source/drain regions along the opposing sidewalls of the conductive gate and around the bottom of the conductive gate in the straight-line vertical cross-section, those portions of the channel region that are along all of the opposing sidewalls of the conductive gate below the pair of source/drain regions in the straight-line vertical cross-section comprising GaP, that portion of the channel region that is directly below the bottom of the conductive gate in the straight-line vertical cross-section being devoid of GaP.

2. The recessed access device of claim 1 wherein that portion of the channel region that is directly below the bottom of the conductive gate in the straight-line vertical cross-section has no detectable GaP therein.

3. The recessed access device of claim 1 wherein those portions of the channel region that are along all of the opposing sidewalls of the conductive gate below the pair of source/drain regions in the straight-line vertical cross-section consist essentially of GaP and conductivity-modifying dopant therein.

4. The recessed access device of claim 1 wherein those portions of the channel region that are along all of the opposing sidewalls of the conductive gate below the pair of source/drain regions in the straight-line vertical cross-section consist essentially of GaP and conductivity-modifying dopant therein.

5. The recessed access device of claim 4 wherein those portions of the channel region that are along all of the opposing sidewalls of the conductive gate below the pair of source/drain regions in the straight-line vertical cross-section consist of GaP and conductivity-modifying dopant therein.

6. The recessed access device of claim 1 comprising a charge-storage device directly electrically coupled to one of the pair of source/drain regions.

7. The recessed access device of claim 1 wherein that portion of the channel region that is directly below the bottom of the conductive gate in the straight-line vertical cross-section consists essentially of Si and conductivity-modifying dopant therein.

8. A DRAM construction comprising the recessed access device of claim 1 .

9. A recessed access device comprising:

a conductive gate in a trench in semiconductor material, the conductive gate in a straight-line vertical cross-section having opposing sidewalls and a bottom below and extending between the opposing sidewalls;

a gate insulator between the conductive gate and the semiconductor material, the gate insulator being along the opposing sidewalls and the bottom of the conductive gate in the straight-line vertical cross-section;

a pair of source/drain regions in upper portions of the semiconductor material on opposing sides of the trench in the straight-line vertical cross-section; and

a channel region in the semiconductor material, the channel region having a pair of top surfaces below the pair of source/drain regions in the straight-line vertical cross-section, the channel region being below the pair of source/drain regions along the opposing sidewalls of the conductive gate and around the bottom of the conductive gate in the straight-line vertical cross-section, the channel region comprising:

a pair of first portions along upper portions of the opposing sidewalls of the conductive gate that are below the pair of source/drain regions in the straight-line vertical cross-section, the first portions comprising GaP;

a pair of second portions along the opposing sidewalls of the conductive gate below the pair of first portions in the straight-line vertical cross-section, the second portions being devoid of GaP; and

a third portion below the pair of second portions in the straight-line vertical cross-section, the third portion extending around the bottom of the conductive gate in the straight-line vertical cross-section and being devoid of GaP.

10. The recessed access device of claim 9 wherein the first portions consist essentially of GaP and conductivity-modifying dopant therein.

11. The recessed access device of claim 9 wherein the second portions have no detectable GaP therein.

12. The recessed access device of claim 9 wherein the third portion has no detectable GaP therein.

13. The recessed access device of claim 12 wherein the second portions have no detectable GaP therein.

14. The recessed access device of claim 9 wherein the first portions consist essentially of GaP and conductivity-modifying dopant therein.

15. The recessed access device of claim 14 wherein the first portions consist of GaP and conductivity-modifying dopant therein.

16. The recessed access device of claim 9 comprising a charge-storage device directly electrically coupled to one of the pair of source/drain regions.

17. The recessed access device of claim 9 wherein the second and third portions consist essentially of Si and conductivity-modifying dopant therein.

18. A DRAM construction comprising the recessed access device of claim 9 .

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
SUPPLEMENT NO. 9 TO PATENT SECURITY AGREEMENT Recorded Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2018
From: GAO, YUNFEI; HILL, RICHARD J.; SANDHU, GURTEJ S.; LIU, HAITAO; PANDEY, DEEPAK CHANDRA; PULUGURTHA, SRINIVAS; KARDA, KAMAL M.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 044947/0620 →