IP Library Granted Patent US 10,521,296
Granted Patent B2
US 10,521,296 · App. 15/900,499 · Granted Dec 31, 2019

Performing an additional decoding operation on an identified set of bits of a data block

Inventors: Yingquan Wu (Palo Alto, CA); Eyal En Gad (Santa Clara, CA)
Assignee: MICRON TECHNOLOGY, INC.
G06F11/1068G11C29/52H03M13/3707
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Quick Facts
Patent No.
US 10,521,296
App. No.
15/900,499
Granted
Dec 31, 2019
Kind
B2
Abstract

A data block may be identified. A first decoding operation may be performed on the data block. An unsuccessful correction of an error of the data block associated with the first decoding operation may be determined. A set of bits of the data block that caused the unsuccessful correction of the error of the data block may be identified. In response to identifying the set of bits of the data block that is associated with the unsuccessful correction of the error, a second decoding operation on the set of bits of the data block may be performed. The second decoding operation may be different than the first decoding operation.

Claims (55)

1. A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to:

identify a data block;

perform a first decoding operation on the data block;

determine that the first decoding operation on the data block is associated with an unsuccessful correction of an error of the data block;

identify a set of bits of the data block that caused the unsuccessful correction of the error of the data block; and

in response to identifying the set of bits of the data block that is associated with the unsuccessful correction of the error, perform a second decoding operation on the set of bits of the data block, wherein the second decoding operation is different than the first decoding operation and wherein to perform the second decoding operation on the set of bits of the data block, the processing device is further to:

determine a discrepancy value for each bit of the set of bits; and

identify a number of particular bits of the set of bits having a same determined discrepancy value.

2. The system of claim 1 , wherein the first decoding operation is to correct a first number of errors in a particular set of bits of the data block and wherein the set of bits of the data block that caused the unsuccessful correction of the error comprises a second number of errors that is greater than the first number of errors that the first decoding operation is to correct.

3. The system of claim 2 , wherein the second decoding operation is to correct the second number of errors in the particular set of bits of the data block, the second number of errors being one integer greater than the first number of errors to be corrected by the first decoding operation.

4. The system of claim 3 , wherein the number of particular bits of the set of bits having the same determined discrepancy value is equal to the second number of errors.

5. The system of claim 4 , wherein the discrepancy value is based on outputs of the first decoding operation performed on the data block.

6. The system of claim 1 , wherein the data block is represented by a plurality of rows and a plurality of columns and wherein to identify the set of bits of the data block that caused the unsuccessful correction of the error of the data block, the processing device is further to:

determine at least one row of the plurality of rows of the data block that is associated with the unsuccessful correction of the error; and

determine at least one column of the plurality of columns of the data block that is associated with the unsuccessful correction of the error.

7. The system of claim 1 , wherein the data block is represented by a plurality of rows and a plurality of columns, the processing device further to:

store a first status bit for each row of the plurality of rows that indicates whether the first decoding operation was associated with a successful or unsuccessful correction of the error for a corresponding row of the plurality of rows; and

store a second status bit for each column of the plurality of columns that indicates whether the first decoding operation was associated with a successful or unsuccessful correction of the error for a corresponding column of the plurality of columns, wherein identifying the set of bits of the data block that caused the unsuccessful correction of the error is based on the first status bit for the corresponding row and the second status bit for the corresponding column indicating that the first decoding operation was associated with the unsuccessful correction of the error.

8. A method comprising:

identifying a data block;

performing a first decoding operation on the data block;

determining that the first decoding operation on the data block is associated with an unsuccessful correction of an error of the data block;

identifying a set of bits of the data block that caused the unsuccessful correction of the error of the data block; and

in response to identifying the set of bits of the data block that is associated with the unsuccessful correction of the error, performing, by a processing device, a second decoding operation on the set of bits of the data block, wherein the second decoding operation is different than the first decoding operation and wherein performing the second decoding operation on the set of bits of the data block comprises:

determining a discrepancy value for each bit of the set of bits; and

identifying particular bits of the set of bits having a same determined discrepancy value.

9. The method of claim 8 , wherein the first decoding operation is to correct a first number of errors in a particular set of bits of the data block and wherein the set of bits of the data block that caused the unsuccessful correction of the error comprises a second number of errors that is greater than the first number of errors that the first decoding operation is to correct.

10. The method of claim 9 , wherein the second decoding operation is to correct the second number of errors in the particular set of bits of the data block, the second number of errors being one integer greater than the first number of errors to be corrected by the first decoding operation.

11. The method of claim 10 ,

wherein the number of the particular bits having the same determined discrepancy value is equal to the second number of errors.

12. The method of claim 11 , wherein the discrepancy value is based on outputs of the first decoding operation performed on the data block.

13. The method of claim 8 , wherein the data block is represented by a plurality of rows and a plurality of columns and wherein identifying the set of bits of the data block that caused the unsuccessful correction of the error of the data block comprises:

determining at least one row of the plurality of rows of the data block that is associated with the unsuccessful correction of the error; and

determining at least one column of the plurality of columns of the data block that is associated with the unsuccessful correction of the error.

14. The method of claim 8 , wherein the data block is represented by a plurality of rows and a plurality of columns, the method further comprising:

storing a first status bit for each row of the plurality of rows that indicates whether the first decoding operation was associated with a successful or unsuccessful correction of the error for a corresponding row of the plurality of rows; and

storing a second status bit for each column of the plurality of columns that indicates whether the first decoding operation was associated with a successful or unsuccessful correction of the error for a corresponding column of the plurality of columns, wherein identifying the set of bits of the data block that caused the unsuccessful correction of the error is based on the first status bit for the corresponding row and the second status bit for the corresponding column indicating that the first decoding operation was associated with the unsuccessful correction of the error.

15. A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to:

identify a set of bits of a data block that is associated with an unsuccessful first decoding operation, the set of bits comprising a number of errors;

perform a second decoding operation to determine a discrepancy value for each bit of the set of bits;

identify particular bits from the set of bits having a same determined discrepancy value, wherein a number of the particular bits from the set of bits corresponds to the number of errors; and

correct the number of errors from the set of bits by changing values of the particular bits.

16. The system of claim 15 , wherein determining the discrepancy value is based on outputs of the unsuccessful first decoding operation.

17. The system of claim 15 , wherein the processing device is further to:

perform a first decoding operation that is to correct a second number of errors in the set of bits of the data block, wherein the second number of errors is one integer less than the number of errors and wherein the identifying of the set of bits of the data block that is associated with the unsuccessful first decoding operation is in response to performing the first decoding operation.

18. The system of claim 15 , wherein the data block is represented by a plurality of rows and a plurality of columns, and wherein to identify the set of bits of the data block that is associated with the unsuccessful first decoding operation, the processing device is further to:

determine at least one row of the plurality of rows of the data block is associated with the unsuccessful first decoding operation; and

determine at least one column of the plurality of columns of the data block is associated with the unsuccessful first decoding operation.

19. The system of claim 15 , wherein identifying the set of bits of the data block that is associated with the unsuccessful first decoding operation is based on at least one status bit corresponding to the set of bits of the data block indicating the unsuccessful first decoding operation.

20. The system of claim 15 , wherein the processing device is further to:

in response to correcting the number of errors from the set of bits, identify a code word associated with the corrected set of bits of the data block.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
SUPPLEMENT NO. 9 TO PATENT SECURITY AGREEMENT Recorded Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2018
From: WU, YINGQUAN; GAD, EYAL EN
To: MICRON TECHNOLOGY, INC.
Reel/Frame 044981/0871 →
Continuity (1)
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