Systems and methods for facilitating low power on a network-on-chip
Aspects of the present disclosure are directed to a power specification and Network on Chip (NoC) having a power supervisor (PS) unit. The specification is utilized to generate a NoC with power domains and clock domains. The PS is configured with one or more power domain finite state machines (PDFSMs) that drive signaling for the power domains of the NoC, and is configured to power the NoC elements of the power domain on or off. NoC elements are configured to conduct fencing or draining operations to facilitate the power state transitions.
1. A Network on Chip (NoC), comprising a plurality of bridges and a power supervisor (PS) configured to manage a plurality of power domain finite state machines (PDFSMs), each of the plurality of PDFSMs configured to generate a signal to the plurality of bridges indicating a status of a power domain, wherein each bridge from the plurality of bridges synchronizes the signal to its local clock.
2. The NoC of claim 1 , wherein for a transition in a locally synchronized version of power domain active state, each master bridge of the plurality of bridges initiates fencing and completes draining of outstanding transactions, or ceases fencing.
3. The NoC of claim 2 , wherein each of the plurality of bridges is configured to, upon completion of fencing and draining, to drive a fence acknowledgement signal to null and a fence done signal, and upon ceasing fencing, each master bridge drives the fence acknowledgement signal, and drives the fence done signal to null.
4. The NoC of claim 3 , wherein fence acknowledgement signals from each master bridge are combined via an OR function to produce a fence acknowledgement asserted signal to be transmitted to a corresponding PDFSM from the plurality of PDFSMs, wherein the fence acknowledgement asserted signal is to be synchronized to a clock of a corresponding PDFSM, wherein each of the plurality of PDFSMs is configured to wait after it drives power domain active state to null before advancing to the next state.
5. The NoC of claim 4 , wherein fencing done signals from each master bridge are combined via an OR function to produce a fencing acknowledgement deasserted signal, wherein the fencing acknowledgement deasserted signal is to be transmitted to a corresponding PDFSM from the plurality of PDFSMs, wherein the corresponding PDFSM synchronizes the fencing acknowledgement deasserted signal to its own clock, and wherein each of the plurality of PDFSMs is configured to wait after the power domain active state is driven before advancing to the next state.
6. The NoC of claim 1 , wherein for the ones of the plurality of bridges being in power domains that are rendered inactive, fence acknowledgment signals and fence done signals are driven by the ones of the plurality of bridges to null.
7. The NoC of claim 6 , wherein, on wakeup for each master bridge, a local timer is utilized to force the PDFSMs to wait for the duration of a propagation delay before it processes fence acknowledgement signals and fence acknowledgment asserted signals to determine whether to proceed to a next state.