IP Library Granted Patent US 10,256,349
Granted Patent B2
US 10,256,349 · App. 15/909,165 · Granted Apr 9, 2019

Semiconductor device and method for manufacturing the semiconductor device

Inventors: Shunpei Yamazaki (Setagaya, JP); Kengo Akimoto (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/78696H01L21/0234H01L21/02318H01L21/02323H01L21/02565H01L29/247H01L29/4908H01L29/66969H01L29/7869H01L29/78693
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Quick Facts
Patent No.
US 10,256,349
App. No.
15/909,165
Granted
Apr 9, 2019
Kind
B2
Abstract

An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

Claims (50)

1. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate electrode layer with the gate insulating layer therebetween, the oxide semiconductor layer comprising indium and zinc;

a source region over the oxide semiconductor layer;

a drain region over the oxide semiconductor layer, wherein each of the source region and the drain region comprises indium and zinc;

a source electrode layer on the source region; and

a drain electrode layer on the drain region,

wherein each of the source region and the drain region comprises crystal grains having a diameter of 1 nm to 10 nm,

wherein the oxide semiconductor layer extends beyond outer side edges of the source region and the drain region,

wherein the source region extends beyond an outer side edge of the source electrode layer, and

wherein the drain region extends beyond an outer side edge of the drain electrode layer.

2. The semiconductor device according to claim 1 , wherein an oxygen concentration in the oxide semiconductor layer at an interface with the gate insulating layer is higher than at a portion distant from the interface.

3. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer further comprises gallium.

4. The semiconductor device according to claim 1 , wherein each of the source electrode layer and the drain electrode layer comprises a metal selected from the group consisting of aluminum, copper, titanium and molybdenum.

5. The semiconductor device according to claim 1 , wherein an oxygen concentration in the source region and the drain region is lower than an oxygen concentration in the oxide semiconductor layer.

6. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate electrode layer with the gate insulating layer therebetween, the oxide semiconductor layer comprising indium, gallium and zinc;

a source region over the oxide semiconductor layer;

a drain region over the oxide semiconductor layer, wherein each of the source region and the drain region comprises indium and zinc;

a source electrode layer on the source region; and

a drain electrode layer on the drain region, wherein each of the source electrode layer and the drain electrode layer comprises copper,

wherein the oxide semiconductor layer extends beyond outer side edges of the source region and the drain region,

wherein the source region extends beyond an outer side edge of the source electrode layer, and

wherein the drain region extends beyond an outer side edge of the drain electrode layer.

7. The semiconductor device according to claim 6 , wherein each of the source region and the drain region comprises crystal grains having a diameter of 1 nm to 10 nm.

8. The semiconductor device according to claim 6 , wherein an oxygen concentration in the oxide semiconductor layer at an interface with the gate insulating layer is higher than at a portion distant from the interface.

9. The semiconductor device according to claim 6 , wherein each of the source region and the drain region further comprises gallium.

10. The semiconductor device according to claim 6 , wherein the gate electrode layer comprises a metal selected from the group consisting of titanium, molybdenum, chromium, tantalum, tungsten, aluminum and an alloy thereof.

11. The semiconductor device according to claim 6 , wherein an oxygen concentration in the source region and the drain region is lower than an oxygen concentration in the oxide semiconductor layer.

12. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

an oxide semiconductor layer over the gate electrode layer with the gate insulating layer therebetween, the oxide semiconductor layer comprising indium, gallium and zinc;

a first oxide layer over the oxide semiconductor layer;

a second oxide layer over the oxide semiconductor layer, wherein each of the first oxide layer and the second oxide layer comprises indium and zinc;

a first conductive layer on the first oxide layer;

a second conductive layer on the second oxide layer; and

an insulating film over the first conductive layer and the second conductive layer, wherein the insulating film is in contact with an upper surface of the oxide semiconductor layer between the first conductive layer and the second conductive layer,

wherein each of the first conductive layer and the second conductive layer comprises copper,

wherein the oxide semiconductor layer extends beyond outer side edges of the first oxide layer and the second oxide layer,

wherein the first conductive layer does not extend beyond the outer side edge of the first oxide layer, and

wherein the second conductive layer does not extend beyond the outer side edge of the second oxide layer.

13. The semiconductor device according to claim 12 , wherein each of the first oxide layer and the second oxide layer comprises crystal grains having a diameter of 1 nm to 10 nm.

14. The semiconductor device according to claim 12 , wherein an oxygen concentration in the oxide semiconductor layer at an interface with the gate insulating layer is higher than at a portion distant from the interface.

15. The semiconductor device according to claim 12 , wherein each of the first oxide layer and the second oxide layer further comprises gallium.

16. The semiconductor device according to claim 12 , wherein the gate electrode layer comprises a metal selected from the group consisting of titanium, molybdenum, chromium, tantalum, tungsten, aluminum and an alloy thereof.

17. The semiconductor device according to claim 12 , wherein an oxygen concentration in the first oxide layer and the second oxide layer is lower than an oxygen concentration in the oxide semiconductor layer.

Priority Claims (1)
JP 2008-224034 · Sep 1, 2008 · national
Continuity (5)
Continuation 14947109 · Nov 20, 2015
Continuation 14471632 · Aug 28, 2014
Continuation 13356044 · Jan 23, 2012
Continuation 12549415 · Aug 28, 2009
Related Publication 20180190834A1 · Jul 5, 2018
Cited By (1)
US 12,260,898