Adjusting a parameter for a programming operation based on the temperature of a memory system
A temperature related to a memory device is identified. It is determined whether the temperature related to the memory device satisfies a threshold temperature condition. Responsive to detecting that the temperature related to the memory device satisfies the threshold temperature condition, a parameter for a programming operation is adjusted from a first value to a second value to store data at the memory device.
1. A method comprising:
identifying a temperature related to a memory device;
determining, by a processing device, whether the temperature related to the memory device satisfies a threshold temperature condition; and
responsive to detecting that the temperature related to the memory device satisfies the threshold temperature condition, adjusting, by the processing device, a programming step size associated with a programming operation to store data at the memory device from a first value to a second value, wherein the programming step size indicates an increase in voltage value between each of successive programming pulses applied at the memory device to store the data at the memory device.
2. The method of claim 1 , wherein adjusting the programming step size comprises adjusting a difference between a first voltage of a first programming pulse and a second voltage of a second programming pulse of the programming operation.
3. The method of claim 1 , further comprising
determining an error rate associated with the memory device,
wherein the adjusting of the programming step size for the programming operation is based on the error rate of the memory device satisfying a threshold error rate.
4. The method of claim 1 , wherein the temperature related to the memory device satisfies the threshold temperature condition when the temperature is below a threshold temperature, and wherein the adjusting of the programming step size for the programming operation from the first value to the second value corresponds to a decrease in a voltage step associated with the programming operation.
5. The method of claim 1 , wherein the temperature related to the memory device satisfies the threshold temperature condition when the temperature is above a threshold temperature, and wherein the adjusting of the programming step size for the programming operation from the first value to the second value corresponds to an increase in a voltage step associated with the programming operation.
6. The method of claim 1 , wherein the memory device comprises a plurality of multi-level cells (MLCs).
7. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to:
receive temperature associated with a programming operation to store data at the memory device;
compare the temperature related to the memory device to a threshold temperature condition;
identify a characterization of the memory device; and
update a programming step size for the programming operation from a first value to a second value based on the comparison and the characterization of the memory device.
8. The system of claim 7 , wherein to update the programming step size, the processing device is further to adjust a first voltage of a first programming pulse to a second voltage of a second programming pulse of the programming operation.
9. The system of claim 7 , wherein to characterize the memory device, the processing device is further to:
determine an error rate associated with the memory device, and
wherein the update to the programming step size from the first value to the second value is based on the error rate of the memory device satisfying a threshold error rate.
10. The system of claim 7 , wherein the processing device is further to:
determine that the temperature related to the memory device satisfies the threshold temperature condition when the temperature is below a threshold temperature, and
wherein the update of the programming step size from the first value to the second value corresponds to a decrease in a voltage step associated with the programming operation.
11. The system of claim 7 , wherein the processing device is further to:
determine that the temperature related to the memory device satisfies the threshold temperature condition when the temperature is above a threshold temperature, and
wherein the update of the programming step size from the first value to the second value corresponds to an increase in a voltage step associated with the programming operation.
12. The system of claim 7 , wherein the memory device comprises a plurality of multi-level cells (MLCs).
13. A non-transitory computer readable storage medium storing instructions, which when executed by a processing device, cause the processing device to:
identify a temperature related to a memory device;
determine whether the temperature related to the memory device satisfies a threshold temperature condition; and
responsive to detecting that the temperature related to the memory device satisfies the threshold temperature condition, adjust a programming step size associated with a programming operation to store data at the memory device from a first value to a second value, wherein the programming step size indicates an increase in voltage value between each of successive programming pulses applied at the memory device to store the data at the memory device for a programming operation to store data at the memory device.
14. The non-transitory computer readable storage medium of claim 13 , wherein to adjust the programming step size the processing device is further to: adjust a difference between a first voltage of a first programming pulse and a second voltage of a second programming pulse of the programming operation.
15. The non-transitory computer readable storage medium of claim 13 , wherein the processing device is further to:
determine an error rate associated with the memory device,
wherein the adjustment of the programming step size for the programming operation is based on the error rate of the memory device satisfying a threshold error rate.
16. The non-transitory computer readable storage medium of claim 13 , wherein the temperature related to the memory device satisfies the threshold temperature condition when the temperature is below a threshold temperature, and wherein the adjustment of the programming step size for the programming operation from the first value to the second value corresponds to a decrease in a voltage step associated with the programming operation.
17. The non-transitory computer readable storage medium of claim 13 , wherein the temperature related to the memory device satisfies the threshold temperature condition when the temperature is above a threshold temperature, and wherein the adjustment of the programming step size for the programming operation from the first value to the second value corresponds to an increase in a voltage step associated with the programming operation.
18. The non-transitory computer readable storage medium of claim 13 , wherein the memory device comprises a plurality of multi-level cells (MLCs).