IP Library Granted Patent US 10,458,858
Granted Patent B1
US 10,458,858 · App. 15/916,069 · Granted Oct 29, 2019

Micromachined thermistor

Inventors: Carl Arft (Sunnyvale, CA); Aaron Partridge (Cupertino, CA); Paul M. Hagelin (Saratoga, CA)
Assignee: SiTime Corporation
G01K7/226
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Quick Facts
Patent No.
US 10,458,858
App. No.
15/916,069
Granted
Oct 29, 2019
Kind
B1
Abstract

A micromachined apparatus includes micromachined thermistor having first and second ends physically and thermally coupled to a substrate via first and second anchor structures to enable a temperature-dependent resistance of the micromachined thermistor to vary according to a time-varying temperature of the substrate. The micromachined thermistor has a length, from the first end to the second end, greater than a linear distance between the first and second anchor structures.

Claims (29)

1. An integrated circuit package comprising:

a microelectromechanical system (MEMS) die having a MEMS resonator and a thermistor disposed in a coplanar configuration within a silicon layer; and

an integrated circuit die mounted to the MEMS die in a stacked-die configuration and having

temperature measurement circuitry electrically coupled to the thermistor to generate a temperature signal indicative of operating temperature of the MEMS resonator, and

clock generation circuitry electrically coupled to the temperature measurement circuitry and the MEMS die to receive therefrom, respectively, the temperature signal and a reference clock signal indicative of resonant motion of the MEMS resonator and having circuitry to generate a temperature-compensated output clock signal having a frequency in accordance with the temperature signal and a frequency of the reference clock signal.

2. The integrated circuit package of claim 1 , wherein the clock generation circuitry to generate the temperature-compensated output clock signal having a frequency in accordance with the temperature signal and a frequency of the reference clock signal comprises a phase-locked loop circuit that generates, as the temperature-compensated clock signal, a clock signal that is a frequency-adjusted according to the operating temperature indicated by the temperature signal.

3. The integrated circuit package of claim 1 , wherein the MEMS die comprises a buried oxide layer disposed between a silicon substrate and the silicon layer in which the MEMS resonator and the thermistor are disposed, the oxide layer having one or more voids that form one or more cavities, respectively, in which the MEMS resonator and the thermistor are disposed.

4. The integrated circuit package of claim 1 , wherein the MEMS die comprises a thermal coupler disposed between MEMS resonator and the thermistor to provide a path of low thermal resistance therebetween.

5. The integrated circuit package of claim 1 , further comprising a thermal isolation material disposed between the MEMS die and the integrated circuit die to reduce thermal transfer therebetween.

6. The integrated circuit package of claim 1 , wherein a surface of the integrated circuit die seals one or more vents that open to a cavity that includes at least one of the MEMS resonator or the thermistor.

7. The integrated circuit package of claim 1 , wherein the temperature measurement circuitry comprises a bridge-type circuit.

8. The integrated circuit package of claim 1 , wherein the temperature measurement circuitry comprises a reference resistance implemented by a switched-capacitor network.

9. The integrated circuit package of claim 1 , wherein the MEMS resonator is doped with impurity in a predetermined concentration.

10. The integrated circuit package of claim 9 , wherein the impurity comprises phosphorus.

11. A method of fabricating an integrated circuit package, the method comprising:

implementing a microelectromechanical system (MEMS) resonator and a thermistor in a coplanar configuration within a silicon layer of a MEMS die; and

implementing temperature measurement circuitry and clock generating circuitry within an integrated circuit die; and

securing the integrated circuit die to the MEMS die in a stacked-die configuration, including

electrically coupling the temperature measurement circuitry to the thermistor to enable the temperature measurement circuitry to generate, based on a resistance of the MEMS thermistor, a temperature signal indicative of operating temperature of the MEMS resonator, and

electrically coupling the clock generating circuitry to the temperature measurement circuitry and to the MEMS die to enable reception therefrom, respectively, the temperature signal and a reference clock signal indicative of resonant motion of the MEMS resonator, the clock generating circuitry having circuitry to generate a temperature-compensated output clock signal at a frequency in accordance with the temperature signal and a frequency of the reference clock signal.

12. The method of claim 11 , wherein the clock generation circuitry to generate the temperature-compensated output clock signal having a frequency in accordance with the temperature signal and a frequency of the reference clock signal comprises a phase-locked loop circuit that generates, as the temperature-compensated clock signal, a clock signal that is frequency-adjusted according to the operating temperature indicated by the temperature signal.

13. The method of claim 11 , further comprising forming a thermal coupling structure within the MEMS die between MEMS resonator and the thermistor to provide a path of low thermal resistance between the MEMS resonator and the thermistor.

14. The method of claim 11 , further comprising disposing a thermal isolation material between the MEMS die and the integrated circuit die to reduce thermal transfer therebetween.

15. The method of claim 11 , wherein securing the integrated circuit die to the MEMS die comprises mounting the integrated circuit die to the MEMS die such that a surface of the integrated circuit die seals one or more vents that open to a cavity that includes at least one of the MEMS resonator or the thermistor.

16. The method of claim 11 , wherein implementing the temperature measurement circuitry within the integrated circuit die comprises implementing a switched-capacitor network operable as a reference resistance.

17. The method of claim 11 , wherein implementing the MEMS resonator and the thermistor in a coplanar configuration within the silicon layer of the MEMS die comprises implementing the MEMS resonator and the thermistor within a first silicon layer of a semiconductor-on-insulator wafer having a buried oxide layer adjacent the first silicon layer.

18. The method of claim 17 , wherein implementing the MEMS resonator and the thermistor within the first silicon layer comprises removing one or more portions of the buried oxide layer to form one or more cavities, respectively, in which the MEMS resonator and the thermistor are disposed.

19. The method of claim 11 , wherein implementing the MEMS resonator within the silicon layer of the MEMS die comprises implementing a silicon MEMS resonator doped with impurity in a predetermined concentration.

20. The method of claim 19 , wherein the impurity comprises phosphorus.

Assignments (2)
SECURITY INTEREST Recorded Jun 30, 2026
From: SITIME CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 075862/0712 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2019
From: ARFT, CARL; PARTRIDGE, AARON; HAGELIN, PAUL M.
To: SITIME CORPORATION
Reel/Frame 047896/0022 →
Continuity (4)
Division 15601431 · May 22, 2017
Division 14681848 · Apr 8, 2015
Division 13607597 · Sep 7, 2012
Provisional Application 61533148 · Sep 9, 2011
Cited By (2)
US 12,550,615 US 12,656,188