Multi-metal contact structure

1. A microelectronic component comprising one or more semiconductor devices, the microelectronic component comprising:

a substrate including a recess or opening extending from a first surface of the substrate, at least a portion of the first surface of the substrate having a planarized topography;

a first conductive material having a first hardness, disposed within the recess or opening in a first alternating pattern and forming a first portion of an interconnect structure of the microelectronic component, the first portion of the interconnect structure extending normal to a plane of the substrate;

a second conductive material having a second hardness different from the first hardness, disposed within the recess or opening in a second alternating pattern that alternates with the first alternating pattern, and forming a second portion of the interconnect structure of the microelectronic component, the second portion of the interconnect structure extending normal to the plane of the substrate; and

a conductive layer disposed at a preselected depth below the first surface of the substrate and extending parallel to the plane of the substrate, wherein the first portion of the interconnect structure and the second portion of the interconnect structure formed on a first surface of the conductive layer.

2. The microelectronic component of claim 1 , further comprising a layer of the first conductive material disposed over an exposed surface of the second portion of the interconnect structure.

3. The microelectronic component of claim 1 , further comprising a layer of a third conductive material, different from the first and second conductive materials, disposed over an exposed surface of the first and second portions of the interconnect structure.

4. The microelectronic component of claim 1 , further comprising one or more additional conductive materials having one or more additional hardness characteristics different from the first hardness and the second hardness, disposed within the recess or opening in one or more preselected patterns and forming one or more additional portions of the interconnect structure of the microelectronic component.

5. The microelectronic component of claim 1 , wherein the second hardness of the second conductive material is greater than the first hardness of the first conductive material.

6. The microelectronic component of claim 1 , wherein an exposed surface of the second portion of the interconnect structure protrudes above an exposed surface of the first portion of the interconnect structure and is level with or recessed below the first surface of the substrate.

7. The microelectronic component of claim 1 , wherein a coefficient of thermal expansion (CTE) of the first conductive material is greater than a CTE of the second conductive material.

8. The microelectronic component of claim 1 , wherein the first conductive material comprises copper or a copper alloy and the second conductive material comprises nickel or a nickel alloy.

9. The microelectronic component of claim 1 , wherein the first conductive material or the second conductive material comprises at least one of copper, nickel, tin, indium, gallium, or gold, or an alloy of at least one of copper, nickel, tin, indium, gallium, or gold.

10. The microelectronic component of claim 1 , wherein the first alternating pattern comprises a grid pattern and the second alternating pattern comprises a fill between portions of the grid pattern.

11. The microelectronic component of claim 1 , wherein the first portion of the interconnect structure and the second portion of the interconnect structure are adjacent vertical layers, extending normal to the plane of the substrate.

12. The microelectronic component of claim 11 , wherein the adjacent vertical layers include an adhesion layer comprising at least one of titanium, tantalum, or chromium.

13. The microelectronic component of claim 1 , wherein the microelectronic component is a first microelectronic component and the interconnect structure is a first interconnect structure, and further comprising a second microelectronic component, wherein a second interconnect structure of the second microelectronic component is bonded to the first interconnect structure by at least one of via an insulator material without adhesive to insulator material without adhesive bond or by a metal to metal diffusion bond, wherein the first interconnect structure and the second interconnect structure comprise one of an electrical contact pad or a via in pad.

14. A microelectronic component comprising one or more semiconductor devices, the microelectronic component comprising:

a substrate including a recess or opening extending from a first surface of the substrate, at least a portion of the first surface of the substrate having a planarized topography;

a first conductive material having a first hardness, disposed within the recess or opening in a grid pattern and forming a first portion of an interconnect structure of the microelectronic component, the first portion of the interconnect structure extending normal to a plane of the substrate;

a second conductive material having a second hardness different from the first hardness, disposed within the recess or opening in a pattern comprising a fill between portions of the grid pattern and forming a second portion of the interconnect structure of the microelectronic component, the second portion of the interconnect structure extending normal to the plane of the substrate; and

one or more additional conductive materials having one or more additional hardness characteristics different from the first hardness and the second hardness, disposed within the recess or opening and forming one or more additional portions of the interconnect structure of the microelectronic component.

15. A microelectronic assembly, comprising:

a first microelectronic component comprising:

a substrate including a recess or opening extending from a first surface of the substrate, at least a portion of the first surface of the substrate having a planarized topography;

a first conductive material having a first hardness, disposed within the recess or opening in a grid pattern and forming a first portion of a first interconnect structure of the first microelectronic component, the first portion of the first interconnect structure extending normal to a plane of the substrate;

a second conductive material having a second hardness different from the first hardness, disposed within the recess or opening in a pattern comprising a fill between portions of the grid pattern and forming a second portion of the first interconnect structure of the first microelectronic component, the second portion of the first interconnect structure extending normal to the plane of the substrate; and

a second microelectronic component having a second interconnect structure bonded to the first interconnect structure by at least one of an insulator material without an adhesive to the insulator material, without an adhesive bond or by a metal to metal diffusion bond, wherein the first interconnect structure and the second interconnect structure comprise one of an electrical contact pad or a via in pad.