IP Library Granted Patent US 10,475,702
Granted Patent B2
US 10,475,702 · App. 15/920,727 · Granted Nov 12, 2019

Conductive feature formation and structure using bottom-up filling deposition

Inventors: Pin-Wen Chen (Keelung, TW); Chia-Han Lai (Zhubei, TW); Chih-Wei Chang (Chu-Dong Town, TW); Mei-Hui Fu (Hsinchu, TW); Ming-Hsing Tsai (Chu-Pei, TW); Wei-Jung Lin (Hsinchu, TW); Yu Shih Wang (Tainan, TW); Ya-Yi Cheng (Taichung, TW); I-Li Chen (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L21/76895H01L21/28556H01L21/32134H01L21/76883H01L23/535
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Quick Facts
Patent No.
US 10,475,702
App. No.
15/920,727
Granted
Nov 12, 2019
Kind
B2
Abstract

The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In some embodiments, a structure includes a first dielectric layer over a substrate, a first conductive feature through the first dielectric layer, the first conductive feature comprising a first metal, a second dielectric layer over the first dielectric layer, and a second conductive feature through the second dielectric layer having a lower convex surface extending into the first conductive feature, wherein the lower convex surface of the second conductive feature has a tip end extending laterally under a bottom boundary of the second dielectric layer.

Claims (34)

1. A method for semiconductor processing, the method comprising:

forming a first conductive feature in a first dielectric layer;

forming a concave surface on the first conductive feature, the concave surface extends continuously from a first sidewall of a conductive barrier layer of the first conductive feature to a second sidewall of the conductive barrier layer of the first conductive feature; and

forming a second conductive feature in a second dielectric layer, the second dielectric layer being over the first dielectric layer, the second conductive feature having a convex surface mating with the concave surface of the first conductive feature, wherein the convex surface of the second conductive feature has a tip end extending laterally under a bottom surface of the second dielectric layer.

2. The method of claim 1 , wherein the convex surface has a depth greater than 15 Å.

3. The method of claim 1 , wherein the second conductive feature is formed by a bottom-up deposition process.

4. The method of claim 3 , wherein the bottom-up deposition process further comprises:

supplying a deposition gas mixture including a metal containing gas and a reacting gas; and

maintaining a process pressure less than 150 Torr.

5. The method of claim 4 , wherein a ratio of respective flow rates of the reacting gas to the metal containing gas is greater than 20.

6. The method of claim 3 , wherein the bottom-up deposition process is a plasma free thermal CVD process.

7. The method of claim 1 , wherein the concave surface of the first conductive feature is formed by a wet cleaning process.

8. The method of claim 1 , wherein the second conductive feature is in direct contact with the second dielectric layer without a barrier layer or an adhesion layer therebetween.

9. A method for semiconductor processing, the method comprising:

forming a concave surface on a first conductive feature in a first dielectric layer by performing an isotropic etching process through a second dielectric layer, wherein the concave surface extends continuously from a first sidewall of a conductive barrier layer of the first conductive feature to a second sidewall of the conductive barrier layer of the first conductive feature, and wherein the second dielectric layer is over the first dielectric layer; and

forming a second conductive feature in the second dielectric layer using a bottom-up deposition process, the second conductive feature having a convex surface mating with the concave surface on the first conductive feature, wherein the convex surface of the second conductive feature has a tip end extending laterally under a bottom surface of the second dielectric layer.

10. The method of claim 9 , wherein the second conductive feature is formed without plasma.

11. The method of claim 9 , wherein the isotropic etching process includes a wet etching process using a wet solution, wherein the wet solution removes a native oxide from the first conductive feature to form the concave surface.

12. A method comprising:

forming a first conductive feature extending through a first dielectric layer;

depositing a second dielectric layer over the first conductive feature and the first dielectric layer;

patterning an opening in the second dielectric layer to expose the first conductive feature;

etching the first conductive feature to extend the opening below a bottommost surface of the second dielectric layer, wherein etching the first conductive feature comprises immersing the first conductive feature in a solution comprising deionized (DI) water, wherein after etching the first conductive feature, a top surface of the first conductive feature extends directly under the bottommost surface of the second dielectric layer; and

forming a second conductive feature through the second dielectric layer and electrically connected to the first conductive feature, wherein forming the second conductive feature comprises depositing a portion of the second conductive feature to extend continuously between the top surface of the first conductive feature and the bottommost surface of the second dielectric layer.

13. The method of claim 12 , wherein the second conductive feature has a same material composition throughout, and wherein forming the second conductive feature comprises completely filling the opening with the second conductive feature.

14. The method of claim 12 , wherein forming the second conductive feature comprises using a bottom-up deposition process.

15. The method of claim 12 , wherein depositing the second dielectric layer comprises:

depositing an etch stop layer contacting the first dielectric layer and the first conductive feature; and

depositing a low-k dielectric layer over the etch stop layer.

16. The method of claim 12 , wherein etching the first conductive feature comprises removing a native oxide portion of the first conductive feature.

17. The method of claim 12 , wherein the first conductive feature and the second conductive feature comprise different materials.

18. The method of claim 17 , wherein the first conductive feature comprises cobalt, and wherein second conductive feature comprises tungsten.

19. The method of claim 12 , wherein forming the second conductive feature comprises a plasma free deposition process.

20. The method of claim 12 , wherein immersing the first conductive feature in the solution comprising DI water removes a native oxide on a surface of the first conductive feature exposed by the opening to define the top surface of the first conductive feature extending directly under the bottommost surface of the second dielectric layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2018
From: CHEN, PIN-WEN; LAI, CHIA-HAN; CHANG, CHIH-WEI; FU, MEI-HUI; TSAI, MING-HSING; LIN, WEI-JUNG; WANG, YU SHIH; CHENG, YA-YI; CHEN, I-LI
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 045666/0594 →
Continuity (1)
Related Publication 20190287851A1 · Sep 19, 2019