Thinned semiconductor package and related methods
Implementations of semiconductor packages may include a die having a first side and a second side opposite the first side, a first metal layer coupled to the first side of the die, a tin layer coupled to the first metal layer, the first metal layer between the die and the tin layer, a backside metal layer coupled to the second side of the die, and a mold compound coupled to the die. The mold compound may cover a plurality of sidewalls of the first metal layer and a plurality of sidewalls of the tin layer and a surface of the mold compound is coplanar with a surface of the tin layer.
1. A method for forming a semiconductor package comprising:
forming a plurality of bumps on a first side of a wafer;
forming a plurality of recesses into the first side of the wafer to a desired depth into the wafer;
applying a mold compound to the first side of the wafer, wherein the mold compound encapsulates the plurality of bumps and fills the plurality of recesses;
thinning a second side of the wafer to the desired depth of the plurality of recesses;
coupling a backside metal layer to the second side of the wafer;
exposing the plurality of bumps through the mold compound by grinding the mold compound;
forming a plurality of openings through the backside metal layer; and
singulating the mold compound through the plurality of recesses into a plurality of semiconductor packages.
2. The method of claim 1 , wherein each bump of the plurality of bumps comprises a first metal layer and a second metal layer, wherein the first metal layer is between the second metal layer and the wafer.
3. The method of claim 2 , wherein the second metal layer comprises tin.
4. The method of claim 2 , wherein each bump of the plurality of bumps further comprises a third metal layer, wherein the first metal layer comprises copper, the second metal layer comprises tin, and the third metal layer comprises aluminum.
5. The method of claim 1 , wherein the backside metal layer comprises copper.
6. The method of claim 1 , further comprising planarizing the outer surface of the plurality of bumps with the outer surface of the mold compound.
7. The method of claim 1 , wherein the second side of the wafer is thinned before the plurality of bumps are exposed.
8. A method for forming a semiconductor package comprising:
forming a plurality of bumps on a first side of a wafer;
forming a plurality of recesses into the first side of the wafer;
applying a mold compound to the first side of the wafer, wherein the mold compound encapsulates the plurality of bumps and fills the plurality of recesses;
backgrinding a second side of the wafer to reach the plurality of recesses and singulate a plurality of die from the wafer;
coupling a backside metal layer to a second side of the plurality of die;
exposing the plurality of bumps through the mold compound by grinding the mold compound; and
singulating the mold compound at the plurality of recesses to form a plurality of semiconductor packages.
9. The method of claim 8 , wherein each bump of the plurality of bumps comprises a first metal layer and a second metal layer, wherein the first metal layer is between the second metal layer and the wafer.
10. The method of claim 9 , wherein each bump of the plurality of bumps comprises a third metal layer.
11. The method of claim 9 , wherein the second metal layer comprises tin.
12. The method of claim 8 , wherein the backside metal layer comprises a metal including one of titanium, nickel, silver, vanadium, copper, and any combination thereof.
13. The method of claim 8 , further comprising planarizing the outer surface of the plurality of bumps with the outer surface of the mold compound.
14. The method of claim 8 , wherein the second side of the wafer is background before the plurality of bumps are exposed.