Method for manufacturing semiconductor device and manufacturing method of the same

1. A method for wafer bonding, comprising:

providing a first wafer;

forming a sacrificial layer on a top surface of the first wafer;

trimming an edge of the first wafer to obtain a first wafer area;

cleaning the top surface of the first wafer;

removing the sacrificial layer;

bonding the top surface of the first wafer to a second wafer having a second wafer area greater than the first wafer area; and

thinning the first wafer from a bottom surface opposite to the top surface after trimming the edge of the first wafer, until a trimmed edge is reached.

2. The method of claim 1 , wherein a thickness of the sacrificial layer is between 500 angstrom to 50000 angstrom.

3. The method of claim 1 , wherein the cleaning the top surface of the first wafer comprises a basic and an acidic etching to the top surface.

4. The method of claim 1 , further comprising forming an epitaxial layer after forming the sacrificial layer.

5. The method of claim 1 , further comprising forming a bonding layer over the second wafer prior to bonding the first wafer to the second wafer.

6. The method of claim 1 , further comprising forming an oxide layer over the top surface of the first wafer subsequent to removing the sacrificial layer.

7. The method of claim 1 , further comprising forming an epitaxial layer before forming the sacrificial layer.

8. The method of claim 7 , wherein a width of a trimmed edge of the first wafer is in a range of from about 1 mm to about 3 mm.

9. The method of claim 8 , wherein a depth of the trimmed edge of the first wafer is in a range of from about 0.01 μm to about 200 μm.

10. A method for wafer bonding, comprising:

providing a first wafer having a first bonding surface;

edge-trimming the first wafer at the first bonding surface;

cleaning the first bonding surface; and

performing chemical mechanical polishing (CMP) on the first bonding surface.

11. The method of claim 10 , further comprising forming a SiGe expitaxial layer over the first bonding surface before the edge-trimming and performing the CMP on the SiGe epitaxial layer of the first wafer.

12. The method of claim 10 , further comprising forming a SiGe expitaxial layer over the first bonding surface after the edge-trimming and performing the CMP on the bonding surface of the first wafer.

13. The method of claim 10 , wherein the edge-trimming comprises reducing a diameter of the first wafer in a range of from about 2 mm to about 6 mm in proximal to the first bonding surface.

14. The method of claim 10 , wherein the edge-trimming comprises reducing a thickness of the first wafer in a range of from about 0.01 μm to about 200 μm in proximal to the first bonding surface.

15. The method of claim 10 , further comprising bonding the first wafer having a first diameter at the first bonding surface to a second wafer having a second diameter at a second bonding surface, the second diameter being greater than the first diameter.

16. The method of claim 10 , wherein the CMP is performed subsequent to cleaning the first bonding surface.

17. A method for forming an edge-trimmed wafer, comprising:

providing a wafer having a first surface;

edge-trimming the wafer at the first surface by reducing a diameter of the wafer in a range of from about 2 mm to about 6 mm and reducing a thickness of the wafer in a range of from about 0.01 μm to about 200 μm;

cleaning the first surface by a basic and an acidic etch; and

performing a chemical mechanical polishing (CMP) on the first surface after cleaning the first surface.

18. The method of claim 17 , further comprising ashing and hydrogen fluoride etching after the CMP.

19. The method of claim 17 , further comprising forming a sacrificial layer over the first surface prior to the edge-trimming at the first surface.

20. The method of claim 19 , further comprising removing the sacrificial layer after the edge-trimming at the first surface.