Semiconductor device having silicide layers
A semiconductor device includes a semiconductor substrate having a first side, and a trench structure having a bottom and a sidewall. The bottom has at least first and second bottom portions laterally adjacent to one another. Each bottom portion has a concave shape with a ridge formed between the first and second bottom portions. An insulating material covers the sidewall and first bottom portion of the trench structure while leaving the second bottom portion uncovered. A mesa region extends to the first side of the substrate and forms the sidewall of the trench structure. The device also includes a first silicide layer on a top region of the mesa region, a second silicide layer on the second bottom portion of the trench structure, a first metal layer on and in contact with the first silicide layer, and a second metal layer on and in contact with the second silicide layer.
1. A semiconductor device, comprising:
a semiconductor substrate having a first side;
a trench structure having a bottom and a sidewall, the bottom having at least a first bottom portion and a second bottom portion laterally adjacent to the first bottom portion, wherein each of the first and second bottom portions have a concave shape with a ridge formed between the first and second bottom portions;
an insulating material covering the sidewall and the first bottom portion of the trench structure while leaving the second bottom portion of the trench structure uncovered;
a mesa region extending to the first side of the semiconductor substrate and forming the sidewall of the trench structure;
a first silicide layer on a top region of the mesa region;
a second silicide layer on the second bottom portion of the trench structure;
a first metal layer on and in contact with the first silicide layer; and
a second metal layer on and in contact with the second silicide layer.
2. The semiconductor device of claim 1 , wherein the second metal layer has a larger thickness than the first metal layer and extends from the second silicide layer to above the first side of the semiconductor substrate.
3. The semiconductor device of claim 1 , wherein a distance between the first side of the semiconductor substrate and the bottom of the trench structure is at least 500 nm.
4. The semiconductor device of claim 1 , further comprising:
a first doping region in the mesa region and in ohmic contact with the first silicide layer; and
a second doping region in the semiconductor substrate at the bottom of the trench structure and in ohmic contact with the second silicide layer.
5. The semiconductor device of claim 4 , wherein the first and second doping regions are of the same conductivity type.
6. The semiconductor device of claim 4 , wherein the first silicide layer is separated from the second silicide layer so that the separate electrical connections are provided to the first and second doping regions.
7. The semiconductor device of claim 1 , wherein the second bottom portion is laterally completely surrounded by the first bottom portion at the bottom of the trench structure.
8. The semiconductor device of claim 1 , wherein the insulating material has a ring-like shape and laterally surrounds the second metal layer in the trench structure.
9. The semiconductor device of claim 1 , wherein the trench structure has a ring-like shape in the semiconductor substrate.
10. The semiconductor device of claim 1 , wherein the sidewall of the trench structure remains free from silicide layers.
11. The semiconductor device of claim 1 , wherein the first silicide layer is separated from the second silicide layer.
12. The semiconductor device of claim 1 , wherein the second silicide layer partially extends below the insulating material and occupies a portion of the first bottom portion directly adjacent to the ridge.
13. The semiconductor device of claim 12 , wherein the second silicide layer remains laterally spaced from the sidewall of the trench structure.
14. The semiconductor device of claim 1 , wherein the first silicide layer completely covers the top region of the mesa region and laterally extends up to the sidewall of the trench structure.
15. The semiconductor device of claim 1 , wherein the first metal layer and the second metal layer are spaced apart from each other and not in contact with each other.
16. The semiconductor device of claim 1 , wherein the insulating material provides a lateral electrical insulation between the second metal layer and the mesa region.