Method and apparatus for an image sensor capable of simultaneous integration of electrons and holes

1. A stacked pixel circuit formed on a first chip and a second chip, comprising:

a photodetector configured to generate electron charge and hole charge in response to light;

a charge overflow device connected to the photodetector and configured to divert the hole charge to a capacitor;

a floating body node disposed between the photodetector and the capacitor;

a first readout circuit connected to the photodetector and configured to output an electron charge-generated voltage; wherein the first readout circuit comprises:

a first reset transistor;

a first source follower transistor; and

a first row select transistor;

a floating diffusion node disposed between the photodetector and the first readout circuit; and

a second readout circuit connected to the floating body node and configured to output a hole charge-generated voltage; wherein the second readout circuit comprises:

a second reset transistor;

a second source follower transistor; and

a second row select transistor.

2. The pixel circuit according to claim 1 , wherein the charge overflow device comprises a junction gate field-effect transistor.

3. The pixel circuit according to claim 1 , wherein the charge overflow device comprises a metal-oxide-semiconductor field-effect transistor having a buried channel.

4. The pixel circuit according to claim 1 , wherein:

the first chip comprises:

the photodetector;

the capacitor;

the charge overflow device; and

the first readout circuit; and

the second chip is vertically stacked with the first chip and comprises the second readout circuit.

5. The pixel circuit according to claim 4 , wherein a hybrid bond connects the capacitor and the second readout circuit.

6. The pixel circuit according to claim 1 , further comprising:

a first current source connected to the first readout circuit; and

a second current source connected to the second readout circuit.

7. The pixel circuit according to claim 1 , wherein the charge overflow device diverts charge from the photodetector after the photodetector reaches a predetermined charge storage threshold.

8. A method for operating an image sensor having a pixel circuit configured to simultaneously integrate electrons and holes, comprising:

simultaneously integrating electron charge and hole charge in a photodiode;

transferring the hole charge to a capacitor after the electron charge reaches a predetermined threshold in the photodiode using a charge overflow device;

converting the electron charge to an electron-generated output voltage using a first readout circuit; and

converting the hole charge to a hole-generated output voltage using a second readout circuit.

9. The method for operating an image sensor according to claim 8 , further comprising:

converting the electron-generated output voltage to an equivalent first digital value;

converting the hole-generated output voltage to an equivalent second digital value; and

combining the first and second digital values to form a single high dynamic range digital signal.

10. The method for operating an image sensor according to claim 9 , wherein the image converts the hole charge to the hole-generated output voltage before converting the electron charge to the electron-generated output voltage.

11. A solid-state stacked chip image sensor, comprising:

an array of pixel circuits, each pixel circuit comprising:

a photodiode;

a floating body region;

a capacitor connected to the floating body region and a ground potential;

a charge overflow structure comprising a drain connected to the photodiode and configured to:

divert charge having a first polarity from the photodiode to the drain; and

divert a corresponding charge of opposite polarity to the capacitor after the photodiode has reached a predetermined charge threshold;

a first readout circuit connected to:

a floating diffusion region; and

the photodiode through a charge transferring device;

wherein the first readout circuit is configured to output an electron-generated voltage; and

a second readout circuit connected to the capacitor and configured to output a hole-generated voltage;

wherein each pixel circuit is formed across a first chip stacked vertically with a second chip, wherein:

the first chip comprises:

the photodiode;

the capacitor; and

the first readout circuitry; and

the second chip comprises:

the second readout circuitry;

a first current source connected to the first readout circuitry; and

a second current source connected to the second readout circuitry.

12. The solid-state stacked chip image sensor according to claim 11 , wherein the first chip and the second chip are bonded together with hybrid bonds located at each pixel circuit.

13. The solid-state stacked chip image sensor according to claim 12 , wherein the hybrid bond is substantially vertically aligned with the photodiode.

14. The solid-state stacked chip image sensor according to claim 11 , wherein the charge overflow structure comprises a junction gate field-effect transistor.

15. The solid-state stacked chip image sensor according to claim 11 , wherein the charge overflow structure comprises a metal-oxide-semiconductor field-effect transistor.

16. The solid-state stacked chip image sensor according to claim 11 , wherein the capacitor is located within a deep trench isolation region, and comprises:

a first electrode connected to the floating body region; and

a second electrode connected to a reference potential.

17. The solid-state stacked chip image sensor according to claim 11 , wherein the image sensor is configured as a backside illuminated image sensor.