Sub-threshold voltage leakage current tracking

1. A method, comprising:

determining a sub-threshold leakage current through a first number of memory cells, wherein the first number of memory cells comprises a first page of memory cells of a wear leveled group of pages of memory cells;

determining a threshold voltage based on the sub-threshold leakage current; and

reading at least a second number of memory cells using the threshold voltage, the second number of memory cells comprises a number of second pages of memory cells of the wear leveled group of pages of memory cells.

2. The method of claim 1 , further comprising reading the first number of memory cells using the threshold voltage.

3. The method of claim 1 , wherein the sub-threshold leakage current is a sum of sub-threshold leakage currents through each of the first number of memory cells.

4. The method of claim 1 , wherein determining the threshold voltage based on the sub-threshold leakage current, comprises determining a threshold voltage of the first number of memory cells based on the current and adding a particular voltage to threshold voltage.

5. A method, comprising:

determining a sub-threshold leakage current through a first number of memory cells;

determining a threshold voltage based on the sub-threshold leakage current;

reading at least a second number of memory cells using the threshold voltage; and

storing the threshold voltage in volatile memory.

6. The method of claim 5 , further comprising reading the threshold voltage from volatile memory before reading at least the second number of memory cells.

7. A method, comprising:

determining a sub-threshold leakage current through a first number of memory cells;

determining a threshold voltage based on the sub-threshold leakage current;

reading at least a second number of memory cells using the threshold voltage; and

storing the threshold voltage in non-volatile memory.

8. The method of claim 7 , further comprising reading the threshold voltage from the non-volatile memory using a ramp voltage before reading at least the second number of memory cells.

9. The method of claim 8 , wherein reading the threshold voltage from the non-volatile memory using the ramp voltage comprises determining a configuration pattern based on which memory cells of a number of memory cells in the non-volatile memory experiences a switching event in response to the ramp voltage.

10. A method, comprising:

determining a sub-threshold leakage current through a first number of memory cells,

wherein the first number of memory cells are all programmed to a set state;

determining a threshold voltage based on the sub-threshold leakage current; and

reading at least a second number of memory cells using the threshold voltage.

11. A method, comprising:

determining a sub-threshold leakage current through a first number of memory cells;

determining a threshold voltage based on the sub-threshold leakage current; and

reading at least a second number of memory cells using the threshold voltage, wherein:

the first number of memory cells are a portion of a group of tracking memory cells comprising a third number of memory cells; and

the first number of memory cells are programmed to a set state and the third number of memory cells are programmed to a reset state.

12. The method of claim 11 , further comprising:

programming the first number of memory cells to the reset state;

programming the third number of memory cells to the set state; and

reading at least the second number of memory cells using a sensing voltage determined from sub-threshold leakage current through the third number of memory cells.

13. A method, comprising:

determining a sub-threshold leakage current through a first number of memory cells;

determining a threshold voltage based on the sub-threshold leakage current;

reading at least a second number of memory cells using the threshold voltage; and

writing the first number of memory cells each time the second number of memory cells are written.