IP Library Granted Patent US 10,964,264
Granted Patent B1
US 10,964,264 · App. 15/930,344 · Granted Mar 30, 2021

Electroluminescent display panel having pixel driving circuit

Inventor: Jung Chul Kim (Paju-si, KR)
Assignee: LG DISPLAY CO., LTD.
G09G3/325G09G3/3266G09G3/3291H01L27/3276G09G2310/0278
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Quick Facts
Patent No.
US 10,964,264
App. No.
15/930,344
Granted
Mar 30, 2021
Kind
B1
Abstract

An electroluminescent display panel including a pixel driving circuit that includes a light-emitting element, a first capacitor connected to a first node and a second node, a second capacitor connected to the second node and a high potential voltage line, a driving transistor supplying electric current to the light-emitting element, a first switching circuit controlled by a first scan signal and turned on during the sampling period to compensate for a time-varying characteristic of the driving transistor, a second switching circuit controlled by a second scan signal and turned on during the programming period to apply a data voltage to the second node, and a light emission control circuit controlled by an emission signal and turned on during the initialization period and the emission period to apply the high potential voltage to the driving transistor.

Claims (48)

1. An electroluminescent display panel in which each of a plurality of subpixels included in an n th row (n being a natural number) comprises a pixel driving circuit that is driven according to an initialization period, a sampling period, a programming period, and an emission period, wherein the pixel driving circuit comprises:

a light-emitting element;

a first capacitor connected to a first node and a second node;

a second capacitor connected to the second node and a high potential voltage line which provides a high potential voltage;

a driving transistor configured to supply electric current to the light-emitting element and controlled by a voltage applied to the first node;

a first switching circuit controlled by a first scan signal and turned on during the sampling period to compensate for a time-varying characteristic of the driving transistor;

a second switching circuit controlled by a second scan signal and turned on during the programming period to apply a data voltage to the second node; and

a light emission control circuit controlled by an emission signal and turned on during the initialization period and the emission period to apply the high potential voltage to the driving transistor,

wherein the sampling period is a period exceeding one horizontal period, and the initialization period and the programming period are equal to the one horizontal period.

2. The electroluminescent display panel of claim 1 , wherein the first scan signal and the second scan signal are output from different scan driving circuits.

3. The electroluminescent display panel of claim 1 , wherein an area of the first capacitor is twice as large as an area of the second capacitor.

4. The electroluminescent display panel of claim 1 , wherein the first switching circuit is turned on during the initialization period, a gate of the driving transistor is discharged with an initialization voltage, and the high potential voltage is applied to the second node.

5. The electroluminescent display panel of claim 1 , wherein the pixel driving circuit further comprises a third switching circuit connected to the high potential voltage line and the second node; and

wherein the third switching circuit is controlled by the second scan signal provided in an (n−4) th row and turned on during the initialization period.

6. The electroluminescent display panel of claim 1 , wherein the first switching circuit comprises:

a first transistor connected to the first node and an initialization voltage line;

a second transistor connected to the initialization voltage line and a drain of the driving transistor; and

a third transistor connected to the second node and a source of the driving transistor.

7. The electroluminescent display panel of claim 6 , wherein the first transistor comprises two transistors implemented as a double-gate transistor; and

one of the two transistors which is connected to the first node has a greater channel length than the other transistor which is connected to the initialization voltage line.

8. The electroluminescent display panel of claim 1 , wherein the light emission control circuit comprises:

a first emission transistor connected to the high potential voltage line and a source of the driving transistor and turned on by the emission signal; and

a second emission transistor connected to a drain of the driving transistor and an anode of the light-emitting element and turned on by the emission signal.

9. The electroluminescent display panel of claim 1 , wherein the sampling period varies depending on a resolution of the electroluminescent display panel.

10. An electroluminescent display panel in which each of a plurality of subpixels included in an n th row (n being a natural number) comprises a pixel driving circuit that is driven according to an initialization period, a sampling period, a programming period, and an emission period, wherein the pixel driving circuit comprises:

a light-emitting element;

a first capacitor connected to a first node and a second node;

a second capacitor connected to the second node and a high potential voltage line;

a driving transistor configured to supply electric current to the light-emitting element and controlled by a voltage applied to the first node;

a first switching circuit controlled by a first emission signal and turned on during the sampling period to compensate for a time-varying characteristic of the driving transistor;

a second switching circuit controlled by a scan signal and turned on during the programming period to apply a data voltage to the second node; and

a light emission control circuit controlled by a second emission signal and turned on during the initialization period and the emission period to apply a high potential voltage to the driving transistor,

wherein the sampling period is a period exceeding one horizontal period, and the initialization period and the programming period are equal to the one horizontal period.

11. The electroluminescent display panel of claim 10 , wherein an area of the first capacitor is twice as large as an area of the second capacitor.

12. The electroluminescent display panel of claim 10 , wherein the first switching circuit is an n-type metal oxide semiconductor (NMOS) transistor, and the light emission control circuit is a p-type metal oxide semiconductor (PMOS) transistor.

13. The electroluminescent display panel of claim 10 , wherein the first emission signal is an emission signal provided in an (n−1) th row.

14. The electroluminescent display panel of claim 13 , wherein the first switching circuit is turned on even during the initialization period, a gate of the driving transistor is discharged with an initialization voltage, and the high potential voltage is applied to the second node.

15. The electroluminescent display panel of claim 10 , wherein the first emission signal and the second emission signal are the same emission signal provided in the n th row.

16. The electroluminescent display panel of claim 15 , wherein the pixel driving circuit further comprises a third switching circuit connected to the high potential voltage line, which provides the high potential voltage, and the second node.

17. The electroluminescent display panel of claim 16 , wherein the third switching circuit is turned on during the initialization period.

18. The electroluminescent display panel of claim 16 , wherein turn-on and turn-off of the third switching circuit is controlled by a second scan signal provided in an (n−4) th row.

19. The electroluminescent display panel of claim 10 , wherein the first switching circuit comprises:

a first transistor connected to the first node and an initialization voltage line;

a second transistor connected to the initialization voltage line and a drain of the driving transistor; and

a third transistor connected to the second node and a source of the driving transistor.

20. The electroluminescent display panel of claim 10 , wherein the light emission control circuit comprises:

a first emission transistor connected to the high potential voltage line and a source of the driving transistor and turned on by the emission signal; and

a second emission transistor connected to a drain of the driving transistor and an anode of the light-emitting element and turned on by the emission signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2020
From: KIM, JUNG CHUL
To: LG DISPLAY CO., LTD.
Reel/Frame 052647/0692 →
Priority Claims (1)
KR 10-2019-0144624 · Nov 12, 2019 · national
Cited By (6)
US 12,205,536 US 12,295,210 US 12,369,455 US 12,424,173 US 12,711,913 US 12,738,218