Contacts for highly scaled transistors
A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.
1. A device comprising:
a first source/drain feature, the first source/drain feature having a first edge, a second edge and a third edge;
a second source/drain feature;
a contact feature disposed over the first and second source/drain features, wherein the contact feature includes a first contact layer and a second contact layer over the first contact layer, the first contact layer physically contacting the first edge, the second edge and the third edge of the first source/drain feature; and
a dielectric layer extending continuously from one the first, second and third edges to the second source/drain feature.
2. The device of claim 1 , wherein first source/drain feature further includes a fourth edge that opposes the first edge, and
wherein the dielectric layer physically contacts the fourth edge and the first edge.
3. The device of claim 1 , wherein the first contact layer includes a III-V semiconductor material.
4. The device of claim 1 , wherein the first contact layer extends continuously from the first source/drain feature to the second source/drain feature.
5. The device of claim 1 , further comprising a fin structure disposed over a semiconductor substrate, and
wherein the first source/drain feature physically contacts the fin structure.
6. The device of claim 5 , wherein the fin structure has opposing sidewall surfaces, and
wherein the first source/drain feature physically contacts the opposing sidewall surfaces of the fin structure.
7. The device of claim 1 , wherein the first contact layer defines a recess between the first source/drain feature and the second source/drain feature, and wherein the second contact layer is disposed within the recess.
8. A device comprising:
a fin structure disposed over a semiconductor substrate;
a source/drain feature disposed directly over the fin structure, the source/drain feature having a first side, a second side, and a third side;
a dielectric layer disposed on the fin structure and physically contacting at least one of the first side, the second side, and the third side of the source/drain feature and physically contacting the fin structure; and
a contact feature extending through the dielectric layer and physically contacting the first side, the second side, and the third side of the source/drain feature.
9. The device of claim 8 , further comprising a dielectric isolation structure disposed over the semiconductor substrate, and
wherein the fin structure is at least partially embedded within the dielectric isolation structure.
10. The device of claim 9 , wherein the contact feature physically contacts the fin structure.
11. The device of claim 8 , further comprising a gate structure disposed over the fin structure.
12. The device of claim 8 , wherein the contact feature includes a first layer formed of a first material and a second layer formed of a second material that is different than the first material, the first layer physically contacting the first side, the second side, and the third side of the source/drain feature.
13. The device of claim 8 , further comprising:
another fin structure disposed over the semiconductor substrate;
another source/drain feature disposed directly over the another fin structure, the another source/drain feature having a fourth side, a fifth side, and a sixth side;
the dielectric layer disposed on the another fin structure and physically contacting at least one of the fourth side, the fifth side, and the sixth side of the another source/drain feature and physically contacting the another fin structure; and
the contact feature physically contacting the fourth side, the fifth side, and the sixth side of the another source/drain feature.
14. The device of claim 8 , wherein the dielectric layer completely covers at least one of the first side, the second side, and the third side of the source/drain feature.
15. A device comprising:
a first source/drain feature at least partially embedded in an isolation structure;
a second source/drain feature disposed over the first source/drain feature, wherein the first source/drain feature is positioned closer to the isolation structure than the second source/drain feature;
a dielectric layer disposed on the first and second source/drain features; and
a first contact feature extending through the dielectric layer to a first side of the first source/drain feature, the first side of the first source/drain feature including a first portion physically contacting the first contact feature and a second portion physically contacting the isolation structure.
16. The device of claim 15 , wherein the first source/drain feature further includes a top surface intersecting the first side of the first source/drain feature, and
wherein the top surface of the first source/drain feature includes a first portion physically contacting the first contact feature and a second portion physically contacting the dielectric layer.
17. The device of claim 15 , further comprising a second contact feature extending through the dielectric layer to the second source/drain feature, the second contact feature physically contacting opposing sidewall surfaces of the second source/drain feature.
18. The device of claim 15 , further comprising:
a mesa disposed over the first source/drain feature; and
a gate structure wrapped around a portion of the mesa, the portion of the mesa serving as a channel region of the gate structure.
19. The device of claim 18 , wherein the second source/drain feature is disposed within another portion of the mesa.
20. The device of claim 15 , wherein the first source/drain feature further includes a top surface intersecting the first side of the first source/drain feature, and
wherein the top surface of the first source/drain feature includes a first portion physically contacting the first contact feature, a second portion physically contacting the dielectric layer and third portion physically contacting the mesa.