IP Library Granted Patent US 12,336,261
Granted Patent B2
US 12,336,261 · App. 18/360,148 · Granted Jun 17, 2025

Contacts for highly scaled transistors

Inventors: Carlos H. Diaz (Los Altos Hills, CA); Chung-Cheng Wu (Hsin-Chu County, TW); Chia-Hao Chang (Hsinchu, TW); Chih-Hao Wang (Hsinchu County, TW); Jean-Pierre Colinge (Blot L'Eglise, FR); Chun-Hsiung Lin (Hsinchu County, TW); Wai-Yi Lien (Hsinchu, TW); Ying-Keung Leung (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10D64/62H01L21/76852H01L23/5226H01L23/5283H01L23/53271H10D30/025H10D30/43H10D30/62H10D30/6219H10D30/6713H10D30/6728H10D30/6729H10D30/6735H10D30/6757H10D64/252H10D30/6212H10D30/63
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Quick Facts
Patent No.
US 12,336,261
App. No.
18/360,148
Granted
Jun 17, 2025
Kind
B2
Abstract

A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.

Claims (55)

1. A structure, comprising:

a substrate;

a first fin and a second fin rising above the substrate along a first direction;

an isolation structure spacing the first fin apart from the second fin along a second direction perpendicular to the first direction;

a first source/drain structure disposed over the first fin;

a second source/drain structure disposed over the second fin and merging with the first source/drain structure at a merged portion;

a dielectric layer disposed over the first source/drain structure, the second source/drain structure, and the isolation structure;

a semiconductor alloy layer extending through the dielectric layer to physically contact the first source/drain structure, the second source/drain structure and the merged portion; and

a void disposed between the first source/drain structure and the second source/drain structure along the second direction.

2. The structure of claim 1 , further comprising:

a metal layer disposed over the semiconductor alloy layer,

wherein the metal layer is spaced apart from the first source/drain structure, the second source/drain structure, the merged portion, and the dielectric layer by the semiconductor alloy layer.

3. The structure of claim 2 , wherein the metal layer comprises tungsten, copper, or cobalt.

4. The structure of claim 1 , wherein the semiconductor alloy layer comprises titanium, cobalt, nickel, nickel cobalt, other metals, or a combination thereof.

5. The structure of claim 4 , wherein the semiconductor alloy layer further comprises germanium (Ge), InAs, InGaAs, or InP.

6. The structure of claim 1 , wherein thicknesses of the first source/drain structure and the second source/drain structure along the first direction decrease toward the merged portion.

7. The structure of claim 1 , wherein the substrate, the first fin and the second fin comprise the same composition.

8. The structure of claim 1 ,

wherein, along the second direction, the void comprises a first width adjacent the isolation structure and a second width adjacent the merged portion,

wherein the first width is greater than the second width.

9. A structure, comprising:

a substrate;

a first fin and a second fin rising above the substrate along a first direction;

an isolation structure spacing the first fin apart from the second fin along a second direction perpendicular to the first direction;

a first diamond-shaped source/drain structure disposed over the first fin;

a second diamond-shaped source/drain structure disposed over the second fin and merging with the first diamond-shaped source/drain structure at a merged portion;

a dielectric layer disposed over the first diamond-shaped source/drain structure, the second diamond-shaped source/drain structure, and the isolation structure;

a semiconductor alloy layer extending through the dielectric layer to physically contact the first diamond-shaped source/drain structure, the second diamond-shaped source/drain structure and the merged portion; and

a void disposed between the first diamond-shaped source/drain structure and the second diamond-shaped source/drain structure along the second direction,

wherein the semiconductor alloy layer comprises titanium, cobalt, nickel, nickel cobalt, other metals, or a combination thereof.

10. The structure of claim 9 ,

wherein, along the second direction, the void comprises a first width adjacent the isolation structure and a second width adjacent the merged portion,

wherein the first width is greater than the second width.

11. The structure of claim 9 , wherein the semiconductor alloy layer further comprises germanium (Ge), InAs, InGaAs, or InP.

12. The structure of claim 9 , further comprising:

a metal layer disposed over the semiconductor alloy layer,

wherein the metal layer is spaced apart from the first diamond-shaped source/drain structure, the second diamond-shaped source/drain structure, the merged portion, and the dielectric layer by the semiconductor alloy layer.

13. A semiconductor structure, comprising:

a first fin;

a second fin spaced apart from the first fin by an isolation structure;

a first epitaxial feature disposed on the first fin;

a second epitaxial feature disposed on the second fin and merging with the first epitaxial feature at a merged portion;

an interlayer dielectric (ILD) layer over the first epitaxial feature, the second epitaxial feature and the merged portion;

a semiconductor alloy layer extending through the ILD layer to interface the first epitaxial feature, the second epitaxial feature and the merged portion; and

a metal layer disposed over the semiconductor alloy layer,

wherein a space between the first epitaxial feature and the second epitaxial feature as well as below the merged portion comprises a gap.

14. The semiconductor structure of claim 13 ,

wherein the merged portion is disposed directly over the isolation structure.

15. The semiconductor structure of claim 13 , wherein the semiconductor alloy layer comprises titanium, cobalt, nickel, nickel cobalt, other metals, or a combination thereof.

16. The semiconductor structure of claim 13 , further comprising:

a metal layer disposed over the semiconductor alloy layer.

17. The semiconductor structure of claim 16 , wherein the metal layer comprises tungsten, copper, or cobalt.

18. The semiconductor structure of claim 16 , wherein sidewalls of the metal layer are spaced apart from the ILD layer by the semiconductor alloy layer.

19. The semiconductor structure of claim 13 , wherein the merged portion is disposed between the gap and the semiconductor alloy layer.

20. The semiconductor structure of claim 13 , wherein the semiconductor alloy layer further comprises germanium (Ge), InAs, InGaAs, or InP.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2023
From: DIAZ, CARLOS H.; WU, CHUNG-CHENG; CHANG, CHIA-HAO; WANG, CHIH-HAO; COLINGE, JEAN-PIERRE; LIN, CHUN-HSIUNG; LIEN, WAI-YI; LEUNG, YING-KEUNG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 064403/0010 →
Continuity (8)
Division 17837899 · Jun 10, 2022
Continuation 17694043 · Mar 14, 2022
Division 16681927 · Nov 13, 2019
Continuation 15933560 · Mar 23, 2018
Continuation 15362470 · Nov 28, 2016
Division 14872673 · Oct 1, 2015
Provisional Application 62081348 · Nov 18, 2014
Related Publication 20230395687A1 · Dec 7, 2023
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