IP Library Granted Patent US 10,475,519
Granted Patent B2
US 10,475,519 · App. 15/933,678 · Granted Nov 12, 2019

Methods for detecting and mitigating memory media degradation and memory devices employing the same

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Quick Facts
Patent No.
US 10,475,519
App. No.
15/933,678
Granted
Nov 12, 2019
Kind
B2
Abstract

Memory devices, system, and methods for operating the same are provided. The memory device can comprise a non-volatile memory array and control circuitry. The control circuitry can be configured to store a value corresponding to a number of activate commands received at the memory device, update the value in response to receiving an activate command received from a host device, and trigger, in response to the value exceeding a predetermined threshold, a remedial action performed by the memory device. The control circuitry can be further configured to store a second value corresponding to a number of refresh operations performed by the memory device, update the second value in response to performing a refresh operation, and trigger, in response to the value exceeding a second predetermined threshold, a second remedial action performed by the memory device.

Claims (43)

1. A memory device, comprising:

a non-volatile memory array; and

control circuitry configured to:

store a value corresponding to a number of activate commands received at the memory device;

update the value in response to receiving an activate command received from a host device; and

trigger, in response to the value exceeding a predetermined threshold, a remedial action performed by the memory device.

2. The memory device of claim 1 , wherein the remedial action comprises requesting a refresh command from the host device and scheduling a further remedial action.

3. The memory device of claim 2 , wherein the further remedial action comprises a wear leveling operation performed in response to receiving the requested refresh command.

4. The memory device of claim 1 , wherein the remedial action comprises scheduling a wear level operation to be performed in response to a subsequent refresh command received from the host device.

5. The memory device of claim 1 , wherein the remedial action comprises performing a wear leveling operation without waiting to receive a refresh command from the host device.

6. The memory device of claim 1 , wherein updating the value comprises updating the value by an amount corresponding to a device temperature, a device voltage, a device up-time, or a combination thereof.

7. The memory device of claim 1 , wherein the remedial action comprises updating a sense amplifier weight, a read window budget, a reference voltage, a sample timing, or a combination thereof.

8. The memory device of claim 1 , wherein the remedial action comprises resetting the value.

9. The memory device of claim 1 , wherein the value is a first value, the remedial action is a first remedial action, the predetermined threshold is a first predetermined threshold, and the control circuitry is further configured to:

store a second value corresponding to a number of refresh operations performed by the memory device;

update the second value in response to performing a refresh operation; and

trigger, in response to the value exceeding a second predetermined threshold, a second remedial action performed by the memory device.

10. The memory device of claim 9 , wherein the second remedial action comprises updating one or more of a sense amplifier weight, a read window budget, a reference voltage, a sample timing, or a combination thereof.

11. The memory device of claim 9 , wherein the second remedial action comprises resetting the second value.

12. The memory device of claim 1 , wherein a single semiconductor die comprises the non-volatile memory array and the control circuitry.

13. The memory device of claim 1 , wherein the non-volatile array comprises a flash array, a phase change array, a ferroelectric array, or a magnetoresistive array.

14. The memory device of claim 1 , wherein the control circuitry is configured to store the value in the memory array.

15. A method of operating a memory device including a memory array, the method comprising:

storing a value corresponding to a number of activate commands received at the memory device;

updating the value in response to receiving an activate command received from a host device; and

triggering, in response to the value exceeding a predetermined threshold, a remedial action performed by the memory device.

16. The method of claim 15 , wherein the remedial action comprises requesting a refresh command from the host device and scheduling a further remedial action.

17. The method of claim 16 , wherein the further remedial action comprises a wear leveling operation performed in response to receiving the requested refresh command.

18. The method of claim 15 , wherein the remedial action comprises scheduling a wear level operation to be performed in response to a subsequent refresh command received from the host device.

19. The method of claim 15 , wherein the remedial action comprises performing a wear leveling operation without waiting to receive a refresh command from the host device.

20. The method of claim 15 , wherein updating the value comprises updating the value by an amount corresponding to a device temperature, a device voltage, a device up-time, or a combination thereof.

21. The method of claim 15 , wherein the remedial action comprises updating a sense amplifier weight, a read window budget, a reference voltage, a sample timing, or a combination thereof.

22. The method of claim 15 , wherein the remedial action comprises resetting the value.

23. The method of claim 15 , wherein the value is a first value, the remedial action is a first remedial action, the predetermined threshold is a first predetermined threshold, and further comprising:

storing a second value corresponding to a number of refresh operations performed by the memory device;

updating the second value in response to performing a refresh operation; and

triggering, in response to the second value exceeding a second predetermined threshold, a second remedial action performed by the memory device.

24. The method of claim 23 , wherein the second remedial action comprises updating one or more of a sense amplifier weight, a read window budget, a reference voltage, a sample timing, or a combination thereof.

25. The method of claim 23 , wherein the second remedial action comprises resetting the second value.

26. A method of operating a memory system, comprising:

transmitting, to a memory device, an activate command;

receiving from the memory device, based at least in part on the activate command, a request to issue a refresh command; and

issuing, based at least in part on the request, the refresh command.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
SUPPLEMENT NO. 9 TO PATENT SECURITY AGREEMENT Recorded Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2018
From: PARRY, JONATHAN S.; RAAD, GEORGE B.; REHMEYER, JAMES S.; COWLES, TIMOTHY B.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 045325/0474 →