IP Library Granted Patent US 10,607,838
Granted Patent B2
US 10,607,838 · App. 15/934,006 · Granted Mar 31, 2020

Well and punch through stopper formation using conformal doping

Inventors: Effendi Leobandung (Stormville, NY); Tenko Yamashita (Schenectady, NY)
Assignee: International Business Machines Corporation
H01L21/2257H01L21/2256H01L21/823807H01L21/823821H01L21/823892H01L27/0921H01L27/0924H01L29/1083H01L29/16H01L29/66803H01L21/2255
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Quick Facts
Patent No.
US 10,607,838
App. No.
15/934,006
Granted
Mar 31, 2020
Kind
B2
Abstract

A method for doping fins includes forming a first dopant layer in a first region and a second region to a height relative to a plurality of fins, forming a dielectric layer over the fins, removing the dielectric layer and the first dopant layer in the first region to expose a first fin in the first region, forming a second dopant layer over the first fin, and annealing to drive dopants into the fins from the first dopant layer in the second region and from the second dopant layer in the first region.

Claims (27)

1. A method for doping fins, comprising:

forming a first dopant layer in a first region and a second region to a height relative to a plurality of fins, the height being continuously below a top portion of the fins such that an entirety of the first dopant layer is formed below the top portion of the fins;

forming a dielectric layer over the top portion of the fins;

removing the dielectric layer and the first dopant layer in the first region to expose a first fin in the first region;

forming a second dopant layer over the first fin; and

annealing to drive dopants into the fins from the first dopant layer in the second region and from the second dopant layer in the first region.

2. The method as recited claim 1 , wherein the annealing concurrently forms punch through stoppers in the fins.

3. The method as recited in claim 2 , wherein forming the first dopant layer includes:

depositing a doped silicate glass; and

recessing the doped silicate glass to a thickness on the fins associated with the punch through stoppers.

4. The method as recited in claim 1 , wherein forming the first dopant layer further includes depositing the first dopant layer over the fins, and recessing the first dopant layer down to the height.

5. The method as recited in claim 1 , wherein the first dopant layer is disposed between the dielectric layer and the substrate.

6. The method as recited in claim 1 , wherein removing the dielectric layer and the first dopant layer in the first region further includes etching the dielectric layer and the first dopant layer in the first region.

7. The method as recited in claim 1 , wherein forming the second dopant layer over the first fin includes conformally depositing the second dopant layer over the first fin.

8. The method as recited in claim 7 , wherein forming the second dopant layer in the first region further includes recessing the second dopant layer to the height.

9. The method as recited in claim 8 , wherein recessing the second dopant layer includes depositing an organic dielectric layer on the fins.

10. The method as recited in claim 9 , further comprising recessing the organic dielectric layer to the height to etch the second dopant layer to the height.

11. The method as recited in claim 9 , wherein the organic dielectric layer is spun on.

12. The method as recited in claim 1 , wherein forming the second dopant layer includes depositing a doped silicate glass.

13. The method as recited in claim 1 , further comprising forming a cap layer over the second dopant layer.

14. The method as recited in claim 13 , wherein the cap layer is conformally formed over the second dopant layer.

15. The method as recited in claim 13 , further comprising recessing the cap layer and the second dopant layer to the height.

16. The method as recited in claim 1 , wherein the first region includes one of an n-type field effect transistor (NFET) region or a p-type field effect transistor (HET) region and the second region includes the other of the NFET region or the PFET region.

17. The method as recited in claim 1 , wherein the first dopant layer and the second dopant layer include different dopant conductivity types.

18. The method as recited in claim 1 , further comprising forming a field dielectric over the first and second dopant layers.

19. The method as recited in claim 18 , wherein the field dielectric is formed from a base of the fins to a top of punch through stoppers in the fins.

20. The method as recited in claim 1 , wherein the annealing includes forming a first well in the first region below the first dopant layer and a second well in the second region below the second dopant layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052557/0327 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2018
From: LEOBANDUNG, EFFENDI; YAMASHITA, TENKO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 045328/0585 →
Continuity (3)
Continuation 15354637 · Nov 17, 2016
Continuation 15059516 · Mar 3, 2016
Related Publication 20180211838A1 · Jul 26, 2018