Non-volatile storage system with multi-read mode
Technology is disclosed for reading non-volatile memory when a host does not need perfect data. By allowing the memory to return data with some errors, the data will be provided to the host much quicker. Therefore, in response to one or more host read commands, the memory system returns multiple copies of the data over time, progressively getting better so that later in time copies of the data have lower number of errors. The host decides when the error rate is good enough and stops the process (or ignores the rest of the results).
1. A non-volatile memory apparatus, comprising:
non-volatile memory; and
one or more control circuits in communication with the non-volatile memory and an entity external to the non-volatile memory apparatus, the one or more control circuits are configured to receive a read command from the entity external to the non-volatile memory apparatus, the one or more control circuits are configured to read encoded data from the non-volatile memory in response to the read command, the one or more control circuits are configured to perform decoding of the encoded data to generate multiple partially decoded copies of the encoded data, the one or more control circuits are configured to report the multiple partially decoded copies of the encoded data to the entity external to the non-volatile memory apparatus in response to the read command from the entity, each of the reported multiple partially decoded copies of the encoded data have one or more errors and each of the reported multiple partially decoded copies of the encoded data have a different number of errors due to a different amount of decoding.
2. The non-volatile memory apparatus of claim 1 , wherein:
the one or more control circuits are configured to report the multiple partially decoded copies of the encoded data such that a later in time reported partially decoded copy of the encoded data has a lower number of errors than an earlier reported partially decoded copy of the encoded data.
3. The non-volatile memory apparatus of claim 1 , wherein:
the one or more control circuits are configured to report the multiple partially decoded copies of the encoded data such that a later in time reported partially decoded copy of the encoded data has a greater reliability than an earlier reported partially decoded copy of the encoded data.
4. The non-volatile memory apparatus of claim 1 , wherein:
the one or more control circuits are configured to generate the multiple partially decoded copies of the encoded data in response to receiving the read command using a single decoding process that removes the reported multiple partially decoded copies of the encoded data from the single decoding process at different points in the single decoding process.
5. The non-volatile memory apparatus of claim 1 , wherein:
the one or more control circuits are configured to generate the multiple partially decoded copies of the encoded data in response to receiving the read command using multiple different decoding processes.
6. The non-volatile memory apparatus of claim 1 , wherein:
the one or more control circuits include a host interface configured to connect to a host and a memory interface configured to connect with the non-volatile memory, the host is the entity external to the non-volatile memory apparatus, the read command is received from the host via the host interface; and
the one or more control circuits are configured to report the multiple partially decoded copies of the encoded data by storing the multiple partially decoded copies of the encoded data in a buffer behind the host interface from a perspective of the non-volatile memory apparatus.
7. The non-volatile memory apparatus of claim 1 , wherein:
the one or more control circuits are configured to generate L read instructions to read the encoded data from the non-volatile memory in response to the read command and generate M partially decoded copies of the encoded data, where L<M.
8. The non-volatile memory apparatus of claim 1 , wherein:
the one or more control circuits are configured to stop reporting partially decoded copies of the encoded data when two partially decoded copies of the encoded data have numbers of errors within a threshold of each other.
9. The non-volatile memory apparatus of claim 1 , wherein:
the one or more control circuits are configured to stop reporting partially decoded copies of the encoded data in response to a message from the entity external to the non-volatile memory apparatus to stop reporting copies.
10. The non-volatile memory apparatus of claim 1 , wherein:
the one or more control circuits are configured to report the multiple partially decoded copies of the encoded data to a host, the host is the entity external to the non-volatile memory apparatus, the one or more control circuits are configured to stop reporting partially decoded copies of the encoded data in response to an indication that the host has consumed one of the partially decoded copies of the encoded data.
11. The non-volatile memory apparatus of claim 1 , wherein:
the one or more control circuits are configured to report to the entity external to the non-volatile memory apparatus an indication of reliability for each of the reported multiple partially decoded copies of the encoded data.
12. An apparatus, comprising:
a memory interface configured to connect with non-volatile memory;
a host interface configured to connect to a host that is separate from the apparatus; and
one or more processors connected to the memory interface and the host interface, the one or more processors are configured to receive a read command from the host via the host interface, the one or more processors are configured to generate and send multiple read instructions to the non-volatile memory via the memory interface in response to the read command, the one or more processors are configured to receive encoded data from the non-volatile memory via the memory interface in response to the read instruction, the one or more processors are configured to generate multiple partially decoded copies of the encoded data with corresponding indications of reliability, the one or more processors are configured to report the multiple partially decoded copies of the encoded data and the corresponding indications of reliability to the host, the multiple partially decoded copies of the encoded data have different amounts of errors due to different amounts of decoding.
13. The apparatus of claim 12 , wherein:
the one or more processors configured to receive multiple encoded data items in response to the multiple read instructions; and
the one or more processors configured to generate the multiple partially decoded copies of the encoded data by performing separate decoding operations for the multiple encoded data items such that each read instruction of the multiple read instructions is associated with one of the encoded data items and one of the decoding operations to form a read operation, the read operations are configured differently to perform decoding differently.
14. The apparatus of claim 12 , wherein:
the one or more processors, the memory interface and the host interface comprise a controller of a solid state drive;
the host interface implements a NVMe interface; and
the one or more processors are configured to report the multiple partially decoded copies of the encoded data by posting to one completion queue entry associated with all of the multiple partially decoded copies of the encoded data and storing each of the multiple partially decoded copies of the encoded data.
15. A method of reading data from a non-volatile memory system, comprising:
receiving one or more commands to read target data, the one or more commands are received from a host external to the non-volatile memory system;
generating multiple partially decoded copies of the target data, each partially decoded copy of the multiple partially decoded copies of the target data intentionally has a different non-zero number of errors than other partially decoded copies of the multiple partially decoded copies of the target data; and
reporting the multiple partially decoded copies of the target data to the host.
16. The method of claim 15 , wherein:
the receiving the one or more commands comprises receiving M commands to read the target data from the host; and
the generating multiple partially decoded copies of the target data comprises generating and sending L read instructions to non-volatile memory and receiving encoded data from the non-volatile memory in response to the read instructions, the generating multiple partially decoded copies of the target data further comprises preparing N partially decoded copies of the target data using one or more decoding processes, where L>0 and N≤M.
17. A non-volatile memory apparatus, comprising:
a plurality of non-volatile memory cells; and
means for receiving a read request from a host, reading encoded data from the memory cells, generating multiple partially decoded copies of the encoded data using a single decoding process for the encoded data and sequentially reporting the multiple partially decoded copies of the encoded data to the host with each partially decoded version of the encoded data reported progressively having a smaller number of errors due to different amounts of decoding.