IP Library Granted Patent US 10,930,604
Granted Patent B2
US 10,930,604 · App. 15/939,843 · Granted Feb 23, 2021

Ultra-thin multichip power devices

Inventors: Nurul Nadiah Manap (Seremban, MY); Shutesh Krishnan (Seremban, MY); Soon Wei Wang (Seremban, MY)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L24/06H01L24/97H01L25/0655H01L2224/16245H01L2924/01029H01L2924/14
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Quick Facts
Patent No.
US 10,930,604
App. No.
15/939,843
Granted
Feb 23, 2021
Kind
B2
Abstract

A multi-chip module (MCM) includes a molded body portion having a first outer surface and a second outer surface. A conductive layer defines at least a portion of the first outer surface A conductive connection layer portion is disposed outside of the second outer surface of the molded body portion. A first semiconductor die and a second semiconductor die are disposed between the conductive layer and the conductive connection layer, and first molding portion is disposed between the first semiconductor die and the second semiconductor die. The first molding portion extends between the first outer surface and the second outer surface of the molded body portion. A conductive pillar is electrically coupled to the conductive layer defining at least a portion of the first outer surface and the conductive connection layer portion disposed outside of the second outer surface.

Claims (51)

1. A multi-chip module (MCM) package comprising:

a molded body portion of the MCM package having a first outer surface and a second outer surface;

a conductive layer defining at least a portion of the first outer surface of the molded body portion of the MCM package;

a conductive connection layer portion disposed outside of the second outer surface the molded body portion of the MCM package;

a first semiconductor die disposed between the conductive layer and the conductive connection layer portion;

a second semiconductor die disposed between the conductive layer and the conductive connection layer portion, the second semiconductor die having a first side facing the conductive connection layer portion and being co-planar with a first side of the first semiconductor die facing the conductive connection layer portion;

a first molding portion disposed between the first semiconductor die and the second semiconductor die, the first molding portion extending between the first outer surface and the second outer surface of the molded body portion of the MCM package; and

a conductive pillar electrically coupled to the conductive layer defining at least a portion of the first outer surface and the conductive connection layer portion disposed outside of the second outer surface,

the conductive pillar defining at least a portion of an electrical path between the first semiconductor die and the second semiconductor die,

the first side of the second semiconductor die including a source coupled to the conductive connection layer portion via a conductive source coupling layer.

2. The MCM package of claim 1 , wherein the first molding portion is disposed between the first semiconductor die and the conductive pillar, and vertically extends from the first outer surface to the conductive connection layer portion disposed outside of the second outer surface.

3. The MCM package of claim 1 , wherein the conductive connection layer portion is a first conductive connection layer portion, and wherein the conductive pillar is electrically coupled to the second semiconductor die via a second conductive connection layer portion.

4. The MCM package of claim 1 , wherein the first molding portion embeds the conductive pillar.

5. The MCM package of claim 1 , further comprising:

a conductive spacer electrically coupled between the conductive pillar and the conductive connection layer portion.

6. The MCM package of claim 5 , wherein the conductive spacer functions as an etch stop.

7. A multi-chip module (MCM) package comprising:

a molded body portion of the MCM package having a first outer surface and a second outer surface;

a conductive layer defining at least a portion of the first outer surface of the molded body portion of the MCM package;

a conductive connection layer portion disposed outside of the second outer surface the molded body portion of the MCM package;

a first semiconductor die disposed between the conductive layer and the conductive connection layer portion;

a second semiconductor die disposed between the conductive layer and the conductive connection layer portion, the second semiconductor die having a first side facing the conductive connection layer portion and being co-planar with a first side of the first semiconductor die facing the conductive connection layer portion;

a first molding portion disposed between the first semiconductor die and the second semiconductor die, the first molding portion extending between the first outer surface and the second outer surface of the molded body portion of the MCM package; and

a conductive pillar electrically coupled to the conductive layer defining at least a portion of the first outer surface and the conductive connection layer portion disposed outside of the second outer surface,

the conductive pillar defines at least a portion of an electrical path between a drain of the first semiconductor die and a source of the second semiconductor die.

8. The MCM package of claim 7 , wherein the conductive connection layer portion defines at least a portion of an electrical path between the drain of the first semiconductor die and the source of the second semiconductor die.

9. A multi-chip module (MCM) package comprising:

a molded body portion of the MCM package having a first outer surface and a second outer surface;

a first conductive layer portion and a second conductive layer portion collectively defining at least a portion of the first outer surface of the molded body portion of the MCM package;

a conductive pillar electrically coupled to the second conductive layer portion;

a conductive connection layer portion having:

a first portion disposed outside of the second outer surface of the molded body portion of the MCM package, and

a second portion recessed into the molded body portion of the MCM package and electrically coupled to the conductive pillar;

a first semiconductor die disposed between the first conductive layer portion and the conductive connection layer portion;

a second semiconductor die having a first side facing the conductive connection layer portion and including a source, the source being coupled to the conductive connection layer portion via a conductive source coupling layer; and

a first molding portion disposed between the first semiconductor die and the second semiconductor die, the first molding portion extending between the first outer surface and the second outer surface of the molded body portion of the MCM package,

the conductive pillar and the conductive connection layer portion defining at least a portion of an electrical path between the first semiconductor die and the second semiconductor die.

10. The MCM package of claim 9 , wherein a conductive etch stop layer is disposed along an interface between the conductive connection layer and the conductive pillar, between the conductive connection layer portion and the first molding portion, and between the conductive connection layer portion and the conductive source coupling layer.

11. The MCM package of claim 10 , wherein the conductive pillar and the conductive connection layer portion define at least a portion of an electrical path between a drain of the first semiconductor die and a source of the second semiconductor die.

12. The MCM package of claim 10 , wherein the first semiconductor die and the second semiconductor die each have a drain facing the first outer surface of the molded body portion of the MCM package, and the first semiconductor die and the second semiconductor die each have a source facing the second outer surface of the molded body portion of the MCM package.

13. The MCM package of claim 10 , wherein a second molding portion is disposed between the first conductive layer portion and the second conductive layer portion.

14. A multi-chip module (MCM) package comprising;

a copper pillar disposed between a first semiconductor die and a second semiconductor die, each of the first and second semiconductor dies having a backside metal drain contact,

the copper pillar and the first semiconductor die and the second semiconductor die being covered with molding material with a first end of the copper pillar, a second end of the copper pillar, and the backside metal drain contact of the each of first and second semiconductor dies exposed through the molding material;

a first layer of conductive material electrically connecting the first end of the copper pillar and the backside metal drain contact of the first semiconductor die; and

a second layer of conductive material electrically connecting the second end of the copper pillar and a source contact of the second semiconductor die.

15. The MCM package of claim 14 , wherein the second layer of conductive material back fills over etch recesses in the copper pillar.

16. The MCM package of claim 14 further comprises: a copper plate attached to the first end of the copper pillar and the backside metal drain contact of the first semiconductor die.

17. The MCM package of claim 14 , wherein the copper pillar, the first layer of conductive material, and the second layer of conductive material define at least a portion of an electrical path between a drain of a first semiconductor die and a source of a second semiconductor die.

18. The MCM package of claim 14 , wherein the first semiconductor die and the second semiconductor die each have a drain facing a first outer surface of the MCM package, and the first semiconductor die and the second semiconductor die each have a source facing a second outer surface of the MCM package.

19. The MCM package of claim 14 , wherein a molding portion is disposed between the first layer of conductive material and the second layer conductive material.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 047734, FRAME 0068 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064160/0027 →
SECURITY INTEREST Recorded Dec 6, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047734/0068 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2018
From: MANAP, NURUL NADIAH; KRISHNAN, SHUTESH; WANG, SOON WEI
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 045386/0384 →