IP Library Granted Patent US 10,600,494
Granted Patent B2
US 10,600,494 · App. 15/946,456 · Granted Mar 24, 2020

Methods and apparatuses for self-trimming of a semiconductor device

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Quick Facts
Patent No.
US 10,600,494
App. No.
15/946,456
Granted
Mar 24, 2020
Kind
B2
Abstract

Methods and apparatuses are provided for self-trimming of a semiconductor device. An example apparatus includes a semiconductor device including a self-trimming circuit configured to receive a reference voltage and a test command signal. The self-trimming circuit is configured to convert the reference voltage to a target voltage based on the test command signal and further configured to adjust a voltage trim code until an internal voltage matches the target voltage to determine a trim level associated with the internal voltage.

Claims (19)

1. An apparatus comprising:

a semiconductor device comprising a self-trimming circuit configured to receive a reference voltage and a test command signal, the self-trimming circuit configured to convert the reference voltage to a target voltage based on the test command signal and further configured to adjust a voltage trim code until an internal voltage matches the target voltage to determine a trim level associated with the internal voltage.

2. The apparatus of claim 1 , wherein the self-trimming circuit comprises a reference voltage regulator configured to adjust an output voltage in response to the voltage trim code, wherein the output voltage is the internal voltage.

3. The apparatus of claim 1 , wherein the self-trimming circuit comprises a control circuit configured to decode the test command signal to determine a target voltage code, wherein the target voltage code is used to determine the target voltage.

4. The apparatus of claim 3 , wherein the self-trimming circuit further comprises a digital-to-analog converter configured to receive the reference voltage and to convert the reference voltage to the target voltage based on the target voltage code.

5. The apparatus of claim 3 , wherein the self-trimming circuit further comprises a comparator configured to compare the target voltage with the internal voltage and to provide a stop signal having a value based on the comparison, wherein the control circuit is configured to adjust the voltage trim code based on a value of the stop signal.

6. The apparatus of claim 3 , wherein the control circuit is configured to decode the test command signal to retrieve selection of one of a custom target voltage code or a default target voltage code as the target voltage code.

7. The apparatus of claim 6 , wherein the self-trimming circuit further comprises a metal option bank configured to provide the default target voltage code based on a voltage identifier in the test command signal.

8. The apparatus of claim 6 , wherein the control circuit is configured to decode the test command signal to retrieve the custom target voltage code.

9. A method comprising:

receiving a reference voltage and a test command signal at a semiconductor device;

converting the reference voltage to a target voltage based on the test command signal at the semiconductor device; and

adjusting a voltage trim code until an internal voltage matches the target voltage to determine a trim level associated with the internal voltage.

10. The method of claim 9 , further comprising adjusting an output voltage of a voltage regulator in response to the voltage trim code, wherein the output voltage is the internal voltage.

11. The method of claim 9 , further comprising decoding the test command signal to determine a target voltage code, wherein the target voltage code is used to determine the target voltage.

12. The method of claim 11 , further comprising:

comparing the target voltage with the internal voltage; and

providing a stop signal having a value based on the comparison, wherein adjustment of the voltage trim code is based on a value of the stop signal.

13. The method of claim 11 , further comprising decoding the test command signal to retrieve selection of one of a custom target voltage code or a default target voltage code as the target voltage code.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
SUPPLEMENT NO. 9 TO PATENT SECURITY AGREEMENT Recorded Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 5, 2018
From: JIMENEZ-OLIVARES, MIGUEL; KUZMENKA, MAKSIM
To: MICRON TECHNOLOGY, INC.
Reel/Frame 045451/0196 →