IP Library Granted Patent US 10,439,648
Granted Patent B1
US 10,439,648 · App. 15/950,131 · Granted Oct 8, 2019

Area efficient implementation of a product code error correcting code decoder

Inventors: Patrick R. Khayat (San Diego, CA); Sivagnanam Parthasarathy (Carlsbad, CA); Shantilal Doru (San Diego, CA); Nicholas J. Richardson (San Diego, CA)
Assignee: MICRON TECHNOLOGY, INC.
H03M13/2909G06F11/1076H03M13/1575
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Quick Facts
Patent No.
US 10,439,648
App. No.
15/950,131
Granted
Oct 8, 2019
Kind
B1
Abstract

A method and system for implementing error correcting code using a product code decoder. The method and system receive a product code, wherein the product code is a matrix of row and column component codes, generate a plurality of row syndromes column syndromes from the received product code, store the plurality of row syndromes in a row syndrome queue, store the plurality of column syndromes in a column syndrome queue, the column and row syndrome queue to support the plurality of modes of operation corresponding to the plurality of phases of decoding the product code, correct the plurality of row syndromes and columns syndromes in the row and column syndrome queues based on errors detected in respective row and column syndromes and errors detecting in overlapping syndromes, and correct the product code in a codeword buffer at locations corresponding to corrections in the plurality of row syndromes and the plurality of column syndromes.

Claims (49)

1. A method for implementing error correcting code (ECC) using a product code decoder, the method comprising:

receiving a product code, wherein the product code is a matrix of row and column component codes;

generating a plurality of row syndromes and a plurality of column syndromes from the received product code;

storing the plurality of row syndromes in a row syndrome queue, the row syndrome queue to support a plurality of modes of operation corresponding to a plurality of phases of decoding the product code;

storing the plurality of column syndromes in a column syndrome queue, the column syndrome queue to support the plurality of modes of operation corresponding to the plurality of phases of decoding the product code;

correcting the plurality of row syndromes in the row syndrome queue based on errors detected in respective row syndromes and errors detecting in overlapping column syndromes;

correcting the plurality of column syndromes in the column syndrome queue based on errors detected in respective column syndromes and errors detected in overlapping row syndromes; and

correcting the product code in a codeword buffer at locations corresponding to corrections in the plurality of row syndromes and the plurality of column syndromes.

2. The method of claim 1 , wherein the row syndrome queue stores the plurality of row syndromes by storing each received row syndrome in a register of a plurality of registers in the row syndrome queue and shifting stored row syndromes in the plurality of registers to prepare to receive a next row syndrome.

3. The method of claim 1 , further comprising:

decoding each column syndrome in the plurality of column syndromes to generate corrected column syndromes and row adjustments for row syndromes from the plurality of row syndromes in the row syndrome queue.

4. The method of claim 3 , further comprising:

combining a plurality of the row adjustments with the plurality of row syndromes in the row syndrome queue by combination logic of the row syndrome queue on a single clock cycle.

5. The method of claim 1 , further comprising:

decoding each row syndrome in the plurality of row syndromes to generate corrected row syndromes and adjustments for column syndromes from the plurality of column syndromes.

6. The method of claim 1 , further comprising:

clearing a row syndrome from the plurality of row syndromes in the row syndrome queue in response to a correction of the row syndrome.

7. The method of claim 1 , further comprising:

processing the plurality of row syndromes and the plurality column syndromes iteratively to correct errors in the product code with each row syndrome or column syndrome correction being corrected in a location in a row and column of the product code, the iterative processing rotating the plurality of row syndromes in the row syndrome queue and the plurality of column syndromes in the column syndrome queue into a component decoder and continuing until all rows and columns of the product code are corrected.

8. A product code decoder comprising:

a codeword buffer to store a received product code that is a matrix of row and column component codes;

a row syndrome generator to generate a plurality of row syndromes from the received product code;

a column syndrome generator to generate a plurality of column syndromes from the received product code;

a row syndrome queue having a plurality of registers to store the plurality of row syndromes, the row syndrome queue to support a plurality of modes of operation corresponding to a plurality of phases of decoding the product code;

a column syndrome queue having a plurality of register to store the plurality of column syndromes, the column syndrome queue to support the plurality of modes of operation corresponding to the plurality of phases of decoding the product code;

and

a component code decoder coupled to the codeword buffer, row syndrome generator, and column syndrome generator, the component code decoder to correct the plurality of row syndromes in the row syndrome queue based on errors detected in respective row syndromes and errors detecting in overlapping column syndromes, to correct the plurality of column syndromes in the column syndrome queue based on errors detected in respective column syndromes and errors detected in overlapping row syndromes, and

to identify locations in the product code in the codeword buffer corresponding to corrections in the plurality of row syndromes and the plurality of column syndromes.

9. The product code decoder of claim 8 , wherein the row syndrome queue stores the plurality of row syndromes by storing each received row syndrome in a register of the plurality of registers and shifting stored row syndromes in the plurality of registers to prepare to receive a next row syndrome.

10. The product code decoder of claim 8 , wherein the component code decoder is to decode each column syndrome in the plurality of column syndromes to generate corrected column syndromes and row adjustments for row syndromes from the plurality of row syndromes in the row syndrome queue.

11. The product code decoder of claim 10 , wherein the row syndrome queue is coupled to the component code decoder to combine a plurality of the row adjustments with the plurality of row syndromes in the row syndrome queue by combination logic of the row syndrome queue on a single clock cycle.

12. The product code decoder of claim 8 , wherein the component code decoder is to decode each row syndrome in the plurality of row syndromes to generate corrected row syndromes and adjustments for column syndromes from the plurality of column syndromes.

13. The product code decoder of claim 8 , wherein the component code decoder is to clear a row syndrome from the plurality of row syndromes in a row syndrome queue in response to a correction of the row syndrome.

14. The product code decoder of claim 8 , wherein the component code decoder is to process the plurality of row syndromes and the plurality column syndromes iteratively to correct errors in the product code with each row syndrome or column syndrome correction being corrected in a location in a row and column of the product code, the iterative processing rotating the plurality of row syndromes in the row syndrome queue and the plurality of column syndromes in the column syndrome queue into a component decoder and continuing until all rows and columns of the product code are corrected.

15. A memory system comprising:

a set of memory elements to store data;

a host interface to receive a request to store or access data in the set of memory elements; and

a memory controller including error code correction utilizing a product code decoder, the product code decoder including,

a codeword buffer to store a received product code that is a matrix of row and column component codes,

a row syndrome generator to generate a plurality of row syndromes from the received product code,

a column syndrome generator to generate a plurality of column syndromes from the received product code,

a row syndrome queue having a plurality of registers to store the plurality of row syndromes, the row syndrome queue to support a plurality of modes of operation corresponding to a plurality of phases of decoding the product code,

a column syndrome queue having a plurality of register to store the plurality of column syndromes, the column syndrome queue to support the plurality of modes of operation corresponding to the plurality of phases of decoding the product code, and

a component code decoder coupled to the codeword buffer, row syndrome generator, and column syndrome generator, the component code decoder to correct the plurality of row syndromes in the row syndrome queue based on errors detected in respective row syndromes and errors detecting in overlapping column syndromes, to correct the plurality of column syndromes in the column syndrome queue based on errors detected in respective column syndromes and errors detected in overlapping row syndromes, and to identify locations in the product code corresponding to corrections in the plurality of row syndromes and the plurality of column syndromes.

16. The memory system of claim 15 , wherein the row syndrome queue stores the plurality of row syndromes by storing each received row syndrome in a register in the plurality of registers and shifting stored row syndromes in the plurality of registers to prepare to receive a next row syndrome.

17. The memory system of claim 15 , wherein the component code decoder is to decode each column syndrome in the plurality of column syndromes to generate corrected column syndromes and row adjustments for row syndromes from the plurality of row syndromes in the row syndrome queue.

18. The memory system of claim 17 , wherein the row syndrome queue is coupled to the component code decoder to combine a plurality of the row adjustments with the plurality of row syndromes in the row syndrome queue by combination logic of the row syndrome queue on a single clock cycle.

19. The memory system of claim 15 , wherein the component code decoder is to decode each row syndrome in the plurality of row syndromes to generate corrected row syndromes and adjustments for column syndromes from the plurality of column syndromes.

20. The memory system of claim 15 , wherein the component code decoder is to process the plurality of row syndromes and the plurality column syndromes iteratively to correct errors in the product code with each row syndrome or column syndrome correction being corrected in a location in a row and column of the product code, the iterative rotating the plurality of row syndromes in the row syndrome queue and the plurality of column syndromes in the column syndrome queue into a component decoder and processing continuing until all rows and columns of the product code are corrected.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
SUPPLEMENT NO. 9 TO PATENT SECURITY AGREEMENT Recorded Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2018
From: KHAYAT, PATRICK R.; PARTHASARATHY, SIVAGNANAM; DORU, SHANTILAL; RICHARDSON, NICHOLAS J.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 045506/0633 →
Cited By (1)
US 12,596,612