Multi-nyquist zone analog-to-digital converter (ADC)
A multi-zone analog-to-digital converter (ADC) is provided that includes a track-and-hold (T/H) stage having a bandwidth of L Hertz (Hz) to accept an analog input signal, a clock input to accept a clock signal with a clock frequency of P Hz, and N deinterleaved signal outputs with a combined bandwidth of M Hz. N×(P/2)=M, L>Q×M, and Q is an integer >1. The T/H stage is able to sample an analog input signal in the Qth Nyquist Zone, where Q is an integer. A quantizer stage has N interleaved signal inputs connected to corresponding T/H stage signal outputs, a clock input to accept the clock signal, and an output to supply a digital output signal having a bandwidth of M Hz. A packaging interface typically connects the T/H stage to the quantizer stage, and has a bandwidth less than the clock frequency.
1. A multi-Nyquist zone analog-to-digital converter (ADC) comprising:
a first semiconductor substrate with a track-and-hold (T/H) stage having a signal input to accept an analog input signal and an output to supply an analog output signal subsampled in a Qth Nyquist zone, where Q is an integer greater than 1 and each Nyquist zone has a bandwidth of M Hertz (Hz); and,
a second semiconductor substrate with a quantizer stage having a signal input to accept the analog output signal and an output to supply a digital output signal having a bandwidth of M Hz.
2. The multi-zone ADC of claim 1 wherein the analog output signal comprises N deinterleaved signal outputs, where N is directly proportional to M.
3. The multi-zone ADC of claim 2 wherein the quantizer stage has N signal inputs, each with a signal input bandwidth of less than M Hz, and a clock input to accept a sampling clock having a frequency of P Hz.
4. The multi-zone ADC of claim 1 wherein the T/H stage has a clock input to accept a sampling clock signal having a frequency of P Hz, where P is directly proportional to M.
5. The multi-zone ADC of claim 1 wherein the T/H stage has a signal input bandwidth of L Hz, where L>Q×M.
6. The multi-zone ADC of claim 5 wherein L is at least 105 gigahertz (GHz) and M is about 35 GHz.
7. The multi-zone ADC of claim 1 wherein the first semiconductor substrate is silicon/germanium; and,
wherein the second semiconductor substrate is silicon.
8. The multi-zone ADC of claim 1 wherein the T/H stage comprises:
a polyphase sampler having a signal input to accept the analog input signal, a phase input to accept N phases of a clock signal, and outputs to supply N subsampled signals, with each subsampled signal being sampled at a corresponding clock signal phase;
a delay-locked loop having an input to accept the clock signal, and an output to supply the N phases of the clock frequency;
N output buffers, each output buffer having an input to accept a corresponding subsampled signal and an output to supply a corresponding deinterleaved analog output signal;
wherein the quantizer stage comprises:
a delay-locked loop having an input to accept the clock signal and an output to supply N phases of the clock frequency;
N truncation circuits, each truncation circuit having a signal input to accept a corresponding T/H stage deinterleaved analog output signal, a phase input to accept a corresponding clock signal phase, and a signal output to supply a corresponding digital value; and,
an interleaver having a signal input to accept the N digital values from the truncation circuits, a clock input to accept the clock signal, and an output to supply the digital output signal.
9. A multi-Nyquist zone receiver comprising:
a bandpass filter having an antenna port to accept an analog input signal having a center frequency less than or equal to L Hertz (Hz), and a signal output to supply a filtered signal having a bandwidth of at least M Hz;
a multi-Nyquist zone analog-to-digital converter (ADC) comprising:
a first semiconductor substrate with a track-and-hold (T/H) stage having a signal input with an input bandwidth of at least L Hz to accept the filtered signal and an output to supply an analog output signal subsampled in a Qth Nyquist zone, where Q is an integer greater than 1, where each Nyquist zone has a bandwidth of M Hz, and where L≥Q×M; and,
a second semiconductor substrate with a quantizer stage having a signal input to accept the analog output signal and an output to supply a digital output signal having a bandwidth of M Hz.
10. The multi-zone receiver of claim 9 further comprising:
(Z-1) additional bandpass filters, each additional bandpass filter having an antenna port to accept the analog input signal and a signal output to supply a corresponding filtered signal having a bandwidth of less than or equal to M Hz, where each of the Z bandpass filters supplies a filtered signal in a unique frequency range;
(Z-1) additional T/H stages, each additional T/H stage having a signal input with a bandwidth of at least L Hz to accept a corresponding filtered signal and an output to supply an analog output signal subsampled in a Qth Nyquist zone, where each corresponding Nyquist zone has a bandwidth of less than or equal to M Hz; and,
(Z-1) additional quantizer stages, each additional quantizer stage connected to a corresponding T/H stage signal to receive an analog output signal, and an output to supply a digital output signal having the corresponding bandwidth, where each of the Z quantizer stages supplies an independent digital output signal.
11. The multi-zone receiver of claim 10 further comprising:
a summer having an input connected to the Z quantizer stages to receive the Z independent digital output signals, and an output to supply an interleaved digital output word.
12. The multi-zone receiver of claim 9 wherein the bandpass filter has an adjustable bandpass output and a control input to accept a control signal for selecting the bandpass filter center frequency.
13. The multi-zone receiver of claim 9 wherein the T/H stage supplies an analog output signal subsampled in the third Nyquist zone.
14. The multi-zone receiver of claim 9 wherein the T/H stage supplies N deinterleaved analog output signals; and,
wherein the quantizer stage has N deinterleaved signal inputs, each signal input having a bandwidth of less than M Hz.
15. A signal distribution system comprising:
an input sampling stage able to sample an analog input signal having a bandwidth of M Hertz, with a center frequency of greater than M Hertz and less than L Hertz, sampled at a frequency of P Hertz;
a processing stage where the sampled analog input signal is distributed into N analog output signals, each with a bandwidth of (P/2) Hertz;
an analog output stage with outputs to supply the N analog output signals, each with the bandwidth of (P/2) Hertz, where L≥M=N×(P/2); and,
a quantizer stage having N signal inputs to accept the N analog output signals and an output to supply a digital output signal having a bandwidth of M Hz.
16. The signal distribution system of claim 15 further comprising:
a first semiconductor substrate;
a second semiconductor substrate;
wherein the input sampling stage, processing stage, and analog output stage are formed on the first substrate; and
wherein the quantizer stage is formed on the second substrate.
17. The signal distribution system of claim 16 wherein the first semiconductor substrate is silicon/germanium; and,
wherein the second semiconductor substrate is silicon.
18. The signal distribution system of claim 15 wherein the input sampling stage has a signal input bandwidth of L Hertz, where L>Q×M, and where Q is an integer greater than 1.
19. The signal distribution system of claim 15 wherein each quantizer stage signal input samples a corresponding one of the N analog output signals at a frequency of P Hertz, and where each quantizer stage signal input has a bandwidth of less than M Hertz.
20. A signal distribution system of claim 15 further comprising:
a bandpass filter having an antenna port to accept an analog antenna signal having a center frequency less than or equal to L Hz and a signal output connected to the input sampling stage to supply the analog output signal having the bandwidth of M Hz.
21. A multi-Nyquist zone analog-to-digital conversion method comprising:
a track-and-hold (T/H) stage accepting an analog input signal having a bandwidth of M Hertz (Hz);
the T/H stage sampling the analog input signal;
the T/H stage supplying an analog output signal subsampled in one of Q Nyquist zones, where Q is an integer greater than 1 and each Nyquist zone has a bandwidth of M Hz;
a quantizer stage quantizing the analog output signal; and,
the quantizer stage supplying a digital output signal having a bandwidth of M Hz.
22. The method of claim 21 wherein supplying the analog output signal includes supplying N deinterleaved analog output signals, where N is directly proportional to M.
23. The method of claim 22 wherein quantizing the analog output signal includes the quantizer stage:
having an input bandwidth of less than M Hz; and,
interleaving the N deinterleaved signal outputs at a frequency of P Hz.
24. The method of claim 23 wherein sampling the analog input signal includes sampling the analog input signal at a sampling clock frequency of P Hz, where P is directly proportional to M.
25. The method of claim 21 wherein accepting the analog input signal includes the T/H stage having a signal input bandwidth of L Hz, where L>Q×M.
26. The method of claim 25 wherein L is at least 105 gigahertz (GHz) and M is about 35 GHz.
27. The method of claim 21 further comprising:
fabricating the T/H stage on a single substrate of silicon/germanium; and,
fabricating the quantizer stage on a single substrate of silicon.
28. The method of claim 21 further comprising:
prior to accepting the analog input signal, filtering the analog input signal at a center frequency of less than L Hz, with a bandwidth of at least M Hz.
29. The method of claim 21 wherein supplying the analog output signal subsampled in one of Q Nyquist zones includes supplying an analog output signal in the third Nyquist zone.