Granted Patent B2

US 12,587,427 · App. 18/545,104 · Granted Mar 24, 2026

Inventors: Alphons Litjes (Zijtaart, NL); Erik Olieman (Waalre, NL); Thomas Baier (Graz, AT); Robert Van Veldhoven (Valkenswaard, NL); Yuting Shen (Eindhoven, NL)

Assignee: NXP B.V.

H04L27/38H03M1/12

Abstract

Claims (136)

1 . A system, comprising:

an input terminal configured to receive a quadrature signal;

a decoder configured to process the quadrature signal into an analog in-phase component signal and an analog quadrature component signal;

a first multiplexer coupled to the decoder and including a first output terminal, the first multiplexer being configured to:

receive the analog in-phase component signal,

receive the analog quadrature component signal,

receive a first control signal, and

at a frequency determined by the first control signal, alternately output the analog in-phase component signal and the analog quadrature component signal at the output terminal as a first multiplexer output signal;

an analog-to-digital converter configured to:

sample analog values from the first multiplexer output signal,

convert the analog values into corresponding digital values, and

output the digital values as a digital output stream;

a demultiplexer connected to the analog-to-digital converter, the demultiplexer being configured to:

receive the digital output stream,

receive a second control signal, and

at a frequency determined by the second control signal, alternately output the digital output stream at a first output terminal of the demultiplexer as a digital representation of the in-phase component signal and a second output terminal of the demultiplexer as a digital representation of the quadrature component signal; and

a filter system configured to impose a one-half sampling period delay on at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal, wherein a sampling period is equal to an inverse of a frequency of the first control signal;

wherein the filter system is configured to upsample at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal by a factor, delay the upsampled signal by a number of samples determined by the factor, and downsample the delayed signal by the factor.

2 . The system of claim 1 , wherein the filter system exhibits a linear phase-response to effect a time delay on an input signal to the filter system.

3 . The system of claim 1 , wherein the analog-to-digital converter includes a charge redistribution successive approximation analog-to-digital converter.

4 . A system, comprising:

an input terminal configured to receive a quadrature signal;

a decoder configured to process the quadrature signal into an analog in-phase component signal and an analog quadrature component signal;

a first multiplexer coupled to the decoder and including a first output terminal, the first multiplexer being configured to:

receive the analog in-phase component signal,

receive the analog quadrature component signal,

receive a first control signal, and

at a frequency determined by the first control signal, alternately output the analog in-phase component signal and the analog quadrature component signal at the output terminal as a first multiplexer output signal;

an analog-to-digital converter configured to:

sample analog values from the first multiplexer output signal,

convert the analog values into corresponding digital values, and

output the digital values as a digital output stream;

a demultiplexer connected to the analog-to-digital converter, the demultiplexer being configured to:

receive the digital output stream,

receive a second control signal, and

at a frequency determined by the second control signal, alternately output the digital output stream at a first output terminal of the demultiplexer as a digital representation of the in-phase component signal and a second output terminal of the demultiplexer as a digital representation of the quadrature component signal; and

a filter system configured to impose a one-half sampling period delay on at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal, wherein a sampling period is equal to an inverse of a frequency of the first control signal;

wherein the filter system exhibits a linear phase-response to effect a time delay on an input signal to the filter system;

wherein coefficients of the filter system are determined by:

determining a filter kernel including a first set of coefficients;

upsampling the filter kernel by a factor by interpolating the first set of coefficients to determine a first set of modified filter coefficients;

delaying the first set of modified filter coefficients by a number of samples to determine a second set of modified filter coefficients, wherein the number of samples is determined by the factor; and

downsampling the filter kernel by the factor by interpolating the second set of modified filter coefficients by the factor to determine the coefficients of the filter system.

5 . A system, comprising:

an input terminal configured to receive a quadrature signal;

a decoder configured to process the quadrature signal into an analog in-phase component signal and an analog quadrature component signal;

a first multiplexer coupled to the decoder and including a first output terminal, the first multiplexer being configured to:

receive the analog in-phase component signal,

receive the analog quadrature component signal,

receive a first control signal, and

at a frequency determined by the first control signal, alternately output the analog in-phase component signal and the analog quadrature component signal at the output terminal as a first multiplexer output signal;

an analog-to-digital converter configured to:

sample analog values from the first multiplexer output signal,

convert the analog values into corresponding digital values, and

output the digital values as a digital output stream;

a demultiplexer connected to the analog-to-digital converter, the demultiplexer being configured to:

receive the digital output stream,

receive a second control signal, and

at a frequency determined by the second control signal, alternately output the digital output stream at a first output terminal of the demultiplexer as a digital representation of the in-phase component signal and a second output terminal of the demultiplexer as a digital representation of the quadrature component signal; and

a filter system configured to impose a one-half sampling period delay on at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal, wherein a sampling period is equal to an inverse of a frequency of the first control signal;

wherein the frequency determined by the first control signal is twice a frequency of a sampling frequency of the system.

6 . The system of claim 5 , wherein the filter system is configured to upsample at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal by a factor, delay the upsampled signal by a number of samples determined by the factor, and downsample the delayed signal by the factor.

7 . A system, comprising:

a first input configured to receive an analog in-phase component signal of a quadrature signal;

a second input configured to receive an analog quadrature component signal of the quadrature signal;

a multiplexer including a first output terminal, the multiplexer being configured to alternately output the analog in-phase component signal and the analog quadrature component signal at the output terminal as a multiplexer output signal;

an analog-to-digital converter configured to:

sample analog values from the multiplexer output signal,

convert the analog values into corresponding digital values, and

output the digital values as a digital output stream;

a demultiplexer connected to the analog-to-digital converter, the demultiplexer being configured to alternately output the digital output stream at a first output terminal of the demultiplexer as a digital representation of the in-phase component signal and a second output terminal of the demultiplexer as a digital representation of the quadrature component signal;

a filter system configured to impose a one-half sampling period delay on at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal;

wherein the filter system is configured to upsample at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal by a factor, delay the upsampled signal by a number of samples determined by the factor, and downsample the delayed signal by the factor.

8 . The system of claim 7 , wherein a sampling period is equal to an inverse of an operational frequency of operation of the multiplexer.

9 . The system of claim 7 , wherein the filter system exhibits a linear phase-response to effect a time delay on an input signal to the filter system.

10 . The system of claim 7 , wherein the analog-to-digital converter includes a charge redistribution successive approximation analog-to-digital converter.

11 . A system, comprising:

a first input configured to receive an analog in-phase component signal of a quadrature signal;

a second input configured to receive an analog quadrature component signal of the quadrature signal;

a multiplexer including a first output terminal, the multiplexer being configured to alternately output the analog in-phase component signal and the analog quadrature component signal at the output terminal as a multiplexer output signal;

an analog-to-digital converter configured to:

sample analog values from the multiplexer output signal,

convert the analog values into corresponding digital values, and

output the digital values as a digital output stream;

a demultiplexer connected to the analog-to-digital converter, the demultiplexer being configured to alternately output the digital output stream at a first output terminal of the demultiplexer as a digital representation of the in-phase component signal and a second output terminal of the demultiplexer as a digital representation of the quadrature component signal;

a filter system configured to impose a one-half sampling period delay on at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal;

wherein a sampling period is equal to an inverse of an operational frequency of operation of the multiplexer;

wherein the frequency of operation of the multiplexer is twice a frequency of a sampling frequency of the system.

12 . The system of claim 11 , wherein the filter system is configured to upsample at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal by a factor, delay the upsampled signal by a number of samples determined by the factor, and downsample the delayed signal by the factor.

13 . A system, comprising:

a first input configured to receive an analog in-phase component signal of a quadrature signal;

a second input configured to receive an analog quadrature component signal of the quadrature signal;

a multiplexer including a first output terminal, the multiplexer being configured to alternately output the analog in-phase component signal and the analog quadrature component signal at the output terminal as a multiplexer output signal;

an analog-to-digital converter configured to:

sample analog values from the multiplexer output signal,

convert the analog values into corresponding digital values, and

output the digital values as a digital output stream;

a demultiplexer connected to the analog-to-digital converter, the demultiplexer being configured to alternately output the digital output stream at a first output terminal of the demultiplexer as a digital representation of the in-phase component signal and a second output terminal of the demultiplexer as a digital representation of the quadrature component signal;

a filter system configured to impose a one-half sampling period delay on at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal;

wherein the filter system exhibits a linear phase-response to effect a time delay on an input signal to the filter system;

wherein coefficients of the filter system are determined by:

determining a filter kernel including a first set of coefficients;

upsampling the filter kernel by a factor by interpolating the first set of coefficients to determine a first set of modified filter coefficients;

delaying the first set of modified filter coefficients by a number of samples to determine a second set of modified filter coefficients, wherein the number of samples is determined by the factor; and

downsampling the filter kernel by the factor by interpolating the second set of modified filter coefficients by the factor to determine the coefficients of the filter system.

14 . The system of claim 13 , wherein the filter system is configured to upsample at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal by a factor, delay the upsampled signal by a number of samples determined by the factor, and downsample the delayed signal by the factor.

15 . A method, comprising:

receiving an analog in-phase component signal of a quadrature signal and an analog quadrature component signal of the quadrature signal;

alternately outputting the analog in-phase component signal and the analog quadrature component signal as a first output signal;

sampling analog values from the first output signal;

converting the analog values into corresponding digital values;

outputting the digital values as a digital output stream;

alternately output the digital output stream as a digital representation of the in-phase component signal and a digital representation of the quadrature component signal;

upsampling at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal by a factor of two to generate an upsampled signal;

delaying the upsampled signal by a single sample to generate a delayed signal; and

downsampling the delayed signal by a factor of two.

16 . The method of claim 15 , further comprising imposing a one-half sampling period delay on at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal.

17 . The method of claim 15 , further comprising imposing delays to both the digital representation of the in-phase component signal and the digital representation of the quadrature component signal to effect a one-half sampling period delay between the digital representation of the in-phase component signal and the digital representation of the quadrature component signal.

18 . A method, comprising:

receiving an analog in-phase component signal of a quadrature signal and an analog quadrature component signal of the quadrature signal;

alternately outputting the analog in-phase component signal and the analog quadrature component signal as a first output signal;

sampling analog values from the first output signal;

converting the analog values into corresponding digital values;

outputting the digital values as a digital output stream;

alternately output the digital output stream as a digital representation of the in-phase component signal and a digital representation of the quadrature component signal;

upsampling at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal by a factor of four to generate a first upsampled signal;

delaying the first upsampled signal by a single sample to generate a first delayed signal; and

downsampling the first delayed signal by a factor of four to generate a first output signal.

19 . The method of claim 18 , further comprising:

upsampling at least one of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal by a factor of two to generate an upsampled signal;

delaying the upsampled signal by a single sample to generate a delayed signal; and

downsampling the delayed signal by a factor of two.

20 . The method of claim 18 , further comprising:

upsampling the other of the digital representation of the in-phase component signal and the digital representation of the quadrature component signal by a factor of four to generate a second upsampled signal;

delaying the second upsampled signal by three samples to generate a second delayed signal; and

downsampling the second delayed signal by a factor of four to generate a second output signal, wherein the second output signal is delayed with respect to the first output signal by a one-half sampling period delay.

Assignments (1)

Continuity (1)

References Cited (14)