IP Library Granted Patent US 10,482,965
Granted Patent B1
US 10,482,965 · App. 15/967,265 · Granted Nov 19, 2019

Memory start voltage management

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Quick Facts
Patent No.
US 10,482,965
App. No.
15/967,265
Granted
Nov 19, 2019
Kind
B1
Abstract

A system includes a memory device storing a set of start voltage values, wherein the set of start voltage values each represent voltage levels used to initially store charges in performing operations to corresponding one or more memory locations of the memory device; and a processing device, operatively coupled to the memory device, to: determine whether a quantity of start voltage values in the set of start voltage values stored in the memory device meets a threshold; modify the set of start voltage values stored in the memory device to remove one or more start voltage values from the set in response to a determination that the quantity of start voltage values in the set meets the threshold; and add a new start voltage value to the modified set of start voltage values.

Claims (52)

1. A system, comprising:

a memory device storing a set of start voltage values, wherein the set of start voltage values each represent voltage levels used to initially store charges in performing operations to corresponding one or more memory locations of the memory device; and

a processing device, operatively coupled to the memory device, to:

determine whether a quantity of start voltage values in the set of start voltage values stored in the memory device meets a threshold;

modify the set of start voltage values stored in the memory device to remove one or more start voltage values from the set in response to a determination that the quantity of start voltage values in the set meets the threshold, wherein the one or more start voltage values are removed based on:

tracking an oldest entry within a memory-block list, wherein the oldest entry represents one of the start voltage values corresponding to one of the memory locations having longest delay since last access or charging operation and or that was accessed first, and

deleting the oldest entry; and

add a new start voltage value to the modified set of start voltage values.

2. The system of claim 1 , wherein to determine whether a quantity of start voltage values in the set of start voltage values meets a threshold is triggered according to a predetermined cadence.

3. The system of claim 1 , wherein to determine whether a quantity of start voltage values in the set of start voltage values meets a threshold is triggered when a memory block becomes open and before a first operation to the opened memory block.

4. The system of claim 1 , wherein the processing device is configured further to perform a dummy operation after modifying the set of start voltage values.

5. The system of claim 1 , wherein the processing device is configured to:

determine whether the quantity of start voltage values in the set of start voltage values meets a threshold using auto dynamic word line start voltage (ADWLSV) of the memory device; and

remove the one or more of the start voltage values using a set feature function of ADWLSV.

6. The system of claim 1 , wherein the processing device is configured to remove the one or more of the start voltage values based on resetting a memory-block list to clear the stored set of start voltage values.

7. The system of claim 1 , wherein:

the set of start voltage values are stored using a circular buffer; and

the processing device is configured to track the oldest entry that was stored first amongst the start voltage values.

8. The system of claim 1 , wherein:

the memory device comprises a negative-and (NAND) die; and

the set of start voltage values are stored in the NAND die.

9. The system of claim 1 , wherein the start voltage values correspond to multiple block streams, wherein each block stream is a set of data and/or charge operations that is scheduled for a corresponding block of the memory device, word line of the memory device, or a combination thereof.

10. The system of claim 1 , wherein the processing device is configured to perform operations based on iteratively storing charges in targeted memory cells according to an incremental step pulse programming (ISPP) mechanism, wherein:

a first charging iteration for the ISPP mechanism charges according to one of the start voltage values that corresponds to targeted memory cells, and

the start voltage values are each for reducing a number of iterations to complete the respective operation.

11. A method, comprising:

determining whether a quantity of start voltage values in a set of start voltage values stored in a memory device meets a threshold, wherein the set of start voltage values each represent voltage levels used to initially store charges in performing operations to corresponding one or more memory locations of the memory device;

modifying the set of start voltage values stored in the memory device to remove one or more start voltage values from the set in response to a determination that the quantity of start voltage values in the set meets the threshold, wherein the one or more start voltage values are removed based on:

tracking an oldest entry within a memory-block list, wherein the oldest entry represents one of the start voltage values corresponding to one of the memory locations having longest delay since last access or charging operation and or that was accessed first, and

deleting the oldest entry; and

adding a new start voltage value to the modified set of start voltage values.

12. The method of claim 11 , wherein determining whether a quantity of start voltage values in the set of start voltage values meets a threshold is triggered according to a predetermined cadence.

13. The method of claim 11 , wherein to determining whether a quantity of start voltage values in the set of start voltage values meets a threshold is triggered when a memory block becomes open and before a first operation to the opened memory block.

14. The method of claim 11 , further comprising performing a dummy operation after modifying the set of start voltage values.

15. The method of claim 11 , wherein to remove the one or more of the start voltage values is based on resetting a memory-block list to clear the stored set of start voltage values.

16. The method of claim 11 , wherein:

the set of start voltage values are stored using a circular buffer; and

the method further comprising track the oldest entry that was stored first amongst the start voltage values.

17. The method of claim 11 , wherein the start voltage values correspond to multiple block streams, wherein each block stream is a set of data and/or charge operations that is scheduled for a corresponding block of the memory device, word line of the memory device, or a combination thereof.

18. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

determine whether a quantity of start voltage values in a set of start voltage values stored in a memory device meets a threshold, wherein the set of start voltage values each represent voltage levels used to initially store charges in performing operations to corresponding one or more memory locations of the memory device;

modify the set of start voltage values stored in the memory device to remove one or more start voltage values from the set in response to a determination that the quantity of start voltage values in the set meets the threshold, wherein the one or more start voltage values are removed based on:

tracking an oldest entry within a memory-block list, wherein the oldest entry represents one of the start voltage values corresponding to one of the memory locations having longest delay since last access or charging operation and or that was accessed first, and

deleting the oldest entry; and

add a new start voltage value to the modified set of start voltage values.

19. The non-transitory computer-readable storage medium of claim 18 , wherein to determine whether a quantity of start voltage values in the set of start voltage values meets a threshold is triggered according to a predetermined cadence.

20. The non-transitory computer-readable storage medium of claim 18 , wherein to determine whether a quantity of start voltage values in the set of start voltage values meets a threshold is triggered when a memory block becomes open and before a first operation to the opened memory block.

21. The non-transitory computer-readable storage medium of claim 18 , wherein the processing device is further to perform a dummy operation after modifying the set of start voltage values.

22. The non-transitory computer-readable storage medium of claim 18 , wherein to remove the one or more of the start voltage values is based on resetting a memory-block list to clear the stored set of start voltage values.

23. The non-transitory computer-readable storage medium of claim 18 , wherein:

the set of start voltage values are stored using a circular buffer; and

the processing device is further to track an oldest entry that was stored first amongst the start voltage values.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
SUPPLEMENT NO. 9 TO PATENT SECURITY AGREEMENT Recorded Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2018
From: CADLONI, GERALD L.; KIENTZ, STEVE; LIIKANEN, BRUCE A.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 045673/0626 →