IP Library Granted Patent US 10,579,573
Granted Patent B2
US 10,579,573 · App. 15/969,681 · Granted Mar 3, 2020

Method of implementing a network ASIC in a network device

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Quick Facts
Patent No.
US 10,579,573
App. No.
15/969,681
Granted
Mar 3, 2020
Kind
B2
Abstract

Embodiments of the present invention are directed to a configuration interface of a network ASIC. The configuration interface allows for two modes of traversal of nodes. The nodes form one or more chains. Each chain is in a ring or a list topology. A master receives external access transactions. Once received by the master, an external access transaction traverses the chains to reach a target node. A target node either is an access to a memory space or is a module. A chain can include at least one decoder. A decoder includes logic that determines which of its leaves to send an external access transaction to. In contrast, if a module is not the target node, then the module passes an external access transaction to the next node coupled thereto; otherwise, if the module is the target node, the transmission of the external access transaction stops at the module.

Claims (34)

1. A method of implementing a network ASIC in a network device, wherein the network device includes a plurality of nodes arranged in a tree structure, comprising:

receiving at a trunk of the tree an external access transaction from a source, wherein the plurality of nodes include one or more memory access blocks, one or more decoders and a plurality of modules and the tree structure forms a plurality of rings and a plurality of chains that are each coupled to the trunk, wherein a first decoder of the decoders is coupled with two or more first rings of the rings and two or more of first chains of the plurality of chains;

traversing the tree until the external access transaction reaches a target node, wherein upon receiving the external access transaction, the first decoder determines whether to forward the external access transaction onto one of the first rings or the first chains.

2. The method of claim 1 , wherein the trunk of the tree is a controller.

3. The method of claim 1 , wherein the source is a CPU.

4. The method of claim 1 , further comprising for each node in the tree that is traversed:

when a corresponding node is of a first type, the corresponding node determining which link to send the external access transaction out on and sending the external access transaction out on that link;

when the corresponding node is of a second type, the corresponding node processing the external access transaction accordingly;

when the corresponding node is of a third type and the corresponding node is not the target node, the corresponding node sending the external access transaction out to the next node coupling therewith; and

when the corresponding node is of the third type and the corresponding node is the target node, the corresponding node processing the external transaction accordingly.

5. The method of claim 1 , wherein the target node is either one of the memory access blocks or one of the modules.

6. The method of claim 1 , further comprising:

after processing the external access transaction by the target node, the target node generating an acknowledgment; and

sending the acknowledgment back to the trunk of the tree along a traversal route.

7. The method of claim 1 , wherein the external access transaction includes a read instruction, a write instruction or a combination thereof.

8. The method of claim 4 , wherein the first type is one of the decoders, the second type is one of the memory access blocks, and the third type is one of the modules.

9. A method of implementing a network ASIC in a network device, wherein the network device includes a plurality of nodes arranged in a tree structure, comprising:

receiving at a trunk of the tree an external access transaction from a source, wherein the plurality of nodes include one or more memory access blocks, one or more decoders and a plurality of modules and the tree structure forms one or more rings and a plurality of chains that are each coupled to the trunk, wherein a first decoder of the decoders is coupled with two or more of first chains of the chains and a second decoder of the decoders is a part of one of the first chains and is coupled with two or more second chains of the chains that branch out from the one of the first chains;

traversing the tree until the external access transaction reaches a target node, wherein upon receiving the external access transaction, the first decoder determines which of the first chains to forward the external access transaction onto and the second decoder determines which of the second chains to forward the external access transaction onto.

10. The method of claim 9 , wherein the trunk of the tree is a controller.

11. The method of claim 9 , wherein the source is a CPU.

12. The method of claim 9 , wherein the target node is either one of the memory access blocks or one of the modules.

13. The method of claim 9 , further comprising:

after processing the external access transaction by the target node, the target node generating an acknowledgment; and

sending the acknowledgment back to the trunk of the tree along a traversal route.

14. The method of claim 9 , wherein the external access transaction includes a read instruction, a write instruction or a combination thereof.

15. The method of claim 9 , further comprising for each node in the tree that is traversed:

when a corresponding node is of a first type, the corresponding node determining which link to send the external access transaction out on and sending the external access transaction out on that link;

when the corresponding node is of a second type, the corresponding node processing the external access transaction accordingly;

when the corresponding node is of a third type and the corresponding node is not the target node, the corresponding node sending the external access transaction out to the next node coupling therewith; and

when the corresponding node is of the third type and the corresponding node is the target node, the corresponding node processing the external transaction accordingly.

16. The method of claim 15 , wherein the first type is one of the decoders, the second type is one of the memory access blocks, and the third type is one of the modules.

17. The method of claim 1 , further comprising, for each node in the tree that is traversed, a corresponding node takes one or more of a plurality of actions based on a type of the corresponding node.

18. The method of claim 9 , further comprising, for each node in the tree that is traversed, a corresponding node takes one or more of a plurality of actions based on a type of the corresponding node.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2020
From: CAVIUM, LLC
To: CAVIUM INTERNATIONAL
Reel/Frame 051948/0807 →
CHANGE OF NAME Recorded Sep 27, 2018
From: CAVIUM, INC.
To: CAVIUM, LLC
Reel/Frame 047577/0653 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2018
From: HUTCHISON, GUY TOWNSEND; KRISHNAMOORTHY, HARISH; SCHMIDT, GERALD; ANAND, VISHAL
To: XPLIANT, INC.
Reel/Frame 045698/0974 →
MERGER Recorded May 2, 2018
From: XPLIANT, INC.
To: CAVIUM NETWORKS LLC
Reel/Frame 045698/0981 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2018
From: CAVIUM NETWORKS LLC
To: CAVIUM, INC.
Reel/Frame 045699/0001 →