Semiconductor package having discrete antenna device
One embodiment of the present disclosure provides a semiconductor package including a bottom chip package having a first side and a second side opposing the first side, and a top antenna package mounted on the first side of the bottom chip package. The bottom chip package further includes a semiconductor chip. The semiconductor chip may include a RFIC chip. The top antenna package has at least one radiative antenna element.
1. A semiconductor package, comprising:
a bottom chip package having a first side and a second side opposing the first side, the bottom chip package further including a semiconductor chip;
a top antenna package mounted on the first side of the bottom chip package and having a first radiative antenna element; and
conductive balls or bumps between the top antenna package and the bottom chip package to electrically interconnect the bottom chip package and the top antenna package.
2. The semiconductor package according to claim 1 , wherein the semiconductor chip comprises a RFIC chip.
3. The semiconductor package according to claim 1 , wherein the bottom chip package comprises a package substrate having a core with at least one plated through-hole, and at least one build-up layer.
4. The semiconductor package according to claim 3 , wherein the at least one build-up layer comprises at least one via and conductive traces therein to route signals, ground, and/or power throughout the bottom chip package.
5. The semiconductor package according to claim 4 , wherein the conductive traces on a bottom surface of the at least one build-up layer comprise pads onto which the semiconductor chip is attached with conductive elements.
6. The semiconductor package according to claim 3 , wherein the core comprises epoxy laminates of fiberglass sheets, prepreg, FR-4 materials, FR-5 materials, or combinations thereof.
7. The semiconductor package according to claim 1 , wherein the top antenna package comprises a substrate.
8. The semiconductor package according to claim 7 , wherein the substrate comprises a ceramic substrate, a semiconductor substrate, a dielectric substrate, or a glass substrate.
9. The semiconductor package according to claim 7 , wherein the substrate comprises at least one plated through-hole to route signals from one side of the substrate to the other side of the substrate.
10. The semiconductor package according to claim 7 , wherein the first radiative antenna element is disposed on a surface of the substrate.
11. The semiconductor package according to claim 1 , wherein the top antenna package is a low temperature co-fired ceramic (LTCC), a flip-chip chip-scale-package (FCCSP), a laminate-based package, wire-bond type package or a fan-out type chip package.
12. The semiconductor package according to claim 1 , wherein the semiconductor chip is mounted on the second side of the bottom chip package.
13. The semiconductor package according to claim 1 , wherein the semiconductor chip is mounted on the first side of the bottom chip package.
14. The semiconductor package according to claim 1 , wherein a molding compound is disposed between the top antenna package and the bottom chip package, wherein the molding compound covers and encapsulates the semiconductor chip.
15. The semiconductor package according to claim 14 , wherein the molding compound comprises through mold vias for electrically connecting the top antenna package with the bottom chip package.
16. The semiconductor package according to claim 3 , wherein the semiconductor chip is embedded in the package substrate.
17. The semiconductor package according to claim 1 , wherein another semiconductor chip is mounted on the bottom chip package.
18. The semiconductor package according to claim 17 , wherein the semiconductor chip and said another semiconductor chip are disposed on the first side and the second side of the bottom chip package, respectively.
19. The semiconductor package according to claim 17 , wherein the semiconductor chip and said another semiconductor chip are disposed on the first side of the bottom chip package and inside the bottom chip package, respectively.
20. The semiconductor package according to claim 1 , wherein the top antenna package is larger in size than the bottom chip package.
21. The semiconductor package according to claim 1 , wherein another top antenna package is mounted on the bottom chip package.
22. The semiconductor package according to claim 10 , wherein a second radiative antenna element disposed on the first side of the bottom chip package.
23. The semiconductor package according to claim 22 , wherein the first radiative antenna element is a dual-band antenna element and the second radiative antenna element is a single-band antenna element.