MEMORY SYSTEM WITH A VARIABLE SAMPLING RATE MECHANISM
A memory device includes a memory device comprising a plurality of memory cells; and a processing device coupled to the memory device, the processing device configured to: determine at least one real-time measure including at least one environmental parameter or at least one operational parameter, or a combination thereof, wherein: the environmental parameter corresponds to one or more physical conditions concerning the system, the operational parameter represents one or more operations performed by the system; and generate an adjusted sampling rate based on the real-time measure, wherein the adjusted sampling rate replaces a previous sampling rate used to control a timing associated with gathering information for a sampling process.
1 . A system, comprising:
a memory device comprising a plurality of memory cells; and
a processing device coupled to the memory device, the processing device configured to:
determine at least one real-time measure including at least one environmental parameter or at least one operational parameter, or a combination thereof, wherein:
the environmental parameter corresponds to one or more physical conditions concerning the system,
the operational parameter represents one or more operations performed by the system; and
generate an adjusted sampling rate based on the real-time measure, wherein the adjusted sampling rate replaces a previous sampling rate used to control a timing associated with gathering information for a sampling process.
2 . The system of claim 1 , wherein the real-time measure is a feedback measure determined during implementation of the sampling process at the sampling rate.
3 . The system of claim 1 , wherein the sampling process comprises at least one of a continuous read level calibration (cRLC) mechanism, a dynamic program targeting (DPT) mechanism, a dynamic programming step (DPS) mechanism, a background scan, a read operation, or a temperature sampling process, or a combination thereof.
4 . The system of claim 3 , wherein the adjusted sampling rate controls timing of the read operation, or calculation of an error measure based on one or more read results, or a combination thereof.
5 . The system of claim 3 , wherein the adjusted sampling rate controls timing of implementing the cRLC mechanism, the DPT mechanism, the DPS mechanism, the background scan, a data refresh operation, or an iteration thereof, or a combination thereof.
6 . The system of claim 3 , wherein the cRLC mechanism iteratively adjusts a read level voltage based on a set of read results sampled according to the adjusted rate.
7 . The system of claim 3 , wherein the DPT mechanism iteratively adjusts a desired distribution of program-verify levels based on a set of read results sampled according to the adjusted rate.
8 . The system of claim 3 , wherein the DPS mechanism iteratively adjusts a programming step that is used in iteratively storing charges in one or more of the memory cells for a programming operation.
9 . The system of claim 3 , wherein the background scan reads code words stored in the memory cells and for determining error measures associated with the code words.
10 . The system of claim 1 , wherein the environmental parameter comprises a device temperature, or an operation rate, or a combination thereof, wherein the operation rate represents a frequency or a timing for an operation associated with the operational parameter.
11 . The system of claim 1 , wherein the operational parameter comprises a device status, a status or a result from a device operation, a trigger rate, a performance characteristic, or a parameter change, or a combination thereof.
12 . The system of claim 11 , wherein the device operation comprises a continuous read level calibration (cRLC) mechanism, a dynamic program targeting (DPT) mechanism, a dynamic programming step (DPS) mechanism, a background scan, a garbage collection process, or a data refresh process, or a combination thereof.
13 . The system of claim 11 , wherein the device status represents a level of defects in the memory cells.
14 . The system of claim 1 , wherein the plurality of memory cells is non-volatile.
15 . The system of claim 1 , wherein the processing device is further configured to:
compare the real-time measure to an update threshold; and
replace the sampling rate with the adjusted rate based on the comparison.
16 . A method comprising:
determining at least one real-time measure including at least one environmental parameter or at least one operational parameter, or a combination thereof, wherein:
the environmental parameter corresponds to one or more physical conditions concerning a system,
the operational parameter represents one or more operations performed by the system; and
generating an adjusted sampling rate based on the real-time measure, wherein the adjusted sampling rate replaces a previous sampling rate used to control a timing associated with gathering information for a sampling process.
17 . The method of claim 16 , wherein the real-time measure is a feedback measure determined during implementation of the sampling process at the sampling rate.
18 . The method of claim 16 , wherein the sampling process comprises at least one of a continuous read level calibration (cRLC) mechanism, a dynamic program targeting (DPT) mechanism, a dynamic programming step (DPS) mechanism, a background scan, a read operation, or a temperature sampling process, or a combination thereof.
19 . The method of claim 18 , further comprising implementing the cRLC mechanism, the DPT mechanism, the DPS mechanism, the background scan, a data refresh operation, an iteration thereof, or a combination thereof according to the adjusted rate.
20 . The method of claim 16 , wherein the environmental parameter comprises a device temperature, an operation rate, or a combination thereof, wherein the operation rate represents a frequency or a timing for an operation associated with the operational parameter.