IP Library Granted Patent US 10,529,756
Granted Patent B2
US 10,529,756 · App. 15/982,717 · Granted Jan 7, 2020

Imaging element and imaging apparatus

Inventors: Yosuke Ueno (Kanagawa, JP); Yusuke Ikeda (Tokyo, JP); Shizunori Matsumoto (Kanagawa, JP); Tsutomu Haruta (Kanagawa, JP); Rei Yoshikawa (Kanagawa, JP)
Assignee: Sony Corporation
H01L27/14614H01L27/14601H01L27/14609H01L27/14612H01L27/14627H01L27/14634H04N5/357H04N5/3698H04N5/378H04N5/3745H01L27/14643
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Quick Facts
Patent No.
US 10,529,756
App. No.
15/982,717
Granted
Jan 7, 2020
Kind
B2
Abstract

An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.

Claims (36)

1. An imaging device, comprising:

a first substrate including:

a pixel that outputs a pixel signal, the pixel including:

a photoelectric converter coupled to a first well that receives a first potential; and

at least one transistor coupled to the photoelectric converter; and

a second substrate including:

a peripheral circuit coupled to the pixel and to a second well that receives a second potential greater than the first potential; and

a voltage generation circuit that includes a first output and a second output, the first output configured to output the first potential and the second output configured to output the second potential, wherein the first well is coupled the first output, wherein the second well is coupled to the second output, and wherein the pixel receives a first power source potential.

2. The imaging device according to claim 1 , wherein the peripheral circuit includes an analog to digital converter coupled to the pixel through a signal line.

3. The imaging device according to claim 1 , wherein the peripheral circuit includes a current source circuit.

4. The imaging device according to claim 3 , wherein the first potential is a first negative potential.

5. The imaging device according to claim 4 , wherein the second potential is zero or a second negative potential.

6. The imaging device according to claim 1 , wherein the peripheral circuit is coupled to a second power source potential.

7. The imaging device according to claim 6 , wherein the first power source potential is the same as the second power source potential.

8. The imaging device according to claim 1 , wherein the first substrate is laminated to the second substrate.

9. The imaging device according to claim 8 , wherein the at least one transistor comprises one or more of a transfer transistor, a reset transistor, an amplifier transistor, and a select transistor.

10. The imaging device according to claim 9 , wherein the at least one transistor includes the transfer transistor and a gate of the transfer transistor is coupled to a control line that receives a third potential lower than the first potential.

11. An electronic apparatus, comprising:

an optical unit; and

imaging device including:

a first substrate including:

a pixel that outputs a pixel signal, the pixel including:

a photoelectric converter coupled to a first well that receives a first potential; and

at least one transistor coupled to the photoelectric converter; and

a second substrate including:

a peripheral circuit coupled to the pixel and to a second well that receives a second potential greater than the first potential; and

a voltage generation circuit that includes a first output and a second output, the first output outputting the first potential and the second output outputting the second potential, wherein the first well is coupled the first output, wherein the second well is coupled to the second output, and wherein the pixel receives a first power source potential.

12. The electronic apparatus according to claim 11 , wherein the peripheral circuit includes an analog to digital converter coupled to the pixel through a signal line.

13. The electronic apparatus according to claim 11 , wherein the peripheral circuit includes a current source circuit.

14. The electronic apparatus according to claim 13 , wherein the first potential is a first negative potential.

15. The electronic apparatus according to claim 14 , wherein the second potential is zero or a second negative potential.

16. The electronic apparatus according to claim 11 , wherein the peripheral circuit receives a second power source potential.

17. The electronic apparatus according to claim 16 , wherein the first power source potential is the same as the second power source potential.

18. The electronic apparatus according to claim 11 , wherein the first substrate is laminated to the second substrate,

wherein the at least one transistor comprises one or more of a transfer transistor, a reset transistor, an amplifier transistor, and a select transistor, and

wherein the at least one transistor includes the transfer transistor and a gate of the transfer transistor is coupled to a control line that receives a third potential lower than the first potential.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2019
From: UENO, YOSUKE; IKEDA, YUSUKE; MATSUMOTO, SHIZUNORI; HARUTA, TSUTOMU; YOSHIKAWA, REI
To: SONY CORPORATION
Reel/Frame 050974/0640 →
Priority Claims (1)
JP 2014-034369 · Feb 25, 2014 · national
Continuity (2)
Continuation 15118956
Related Publication 20180269243A1 · Sep 20, 2018