IP Library Granted Patent US 10,541,304
Granted Patent B2
US 10,541,304 · App. 15/983,077 · Granted Jan 21, 2020

Method for fabricating semiconductor device

Inventors: Chih-Kai Hsu (Tainan, TW); Ssu-I Fu (Kaohsiung, TW); Yu-Hsiang Hung (Tainan, TW); Wei-Chi Cheng (Kaohsiung, TW); Jyh-Shyang Jenq (Pingtung, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/0847H01L21/823821H01L27/0924H01L29/42356H01L29/42368H01L29/66545H01L29/66636H01L29/66795H01L29/78H01L29/785H01L29/7833H01L29/7848H01L29/665
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Quick Facts
Patent No.
US 10,541,304
App. No.
15/983,077
Granted
Jan 21, 2020
Kind
B2
Abstract

A method for fabricating semiconductor device includes the steps of: providing a substrate; forming a gate structure on the substrate; forming a spacer adjacent to the gate structure; forming a recess adjacent to the spacer; forming a buffer layer in the recess, wherein the buffer layer comprises a crescent moon shape; and forming an epitaxial layer on the buffer layer.

Claims (17)

1. A method for fabricating semiconductor device, comprising:

providing a substrate;

forming a gate structure on the substrate;

forming a recess adjacent to the gate structure;

forming a buffer layer in the recess, wherein the buffer layer comprises a crescent moon shape, the buffer layer comprises an inner curve and an outer curve intersect on a top surface of the substrate, and each of the inner curve and the outer curve comprises a completely curved surface; and

forming an epitaxial layer on the buffer layer.

2. The method of claim 1 , further comprising:

forming a spacer adjacent to the gate structure; and

forming the recess adjacent to the spacer.

3. The method of claim 2 , wherein the buffer layer comprises a first width and a second width directly under the spacer, wherein the second width is greater than the first width.

4. The method of claim 3 , wherein the first width is between 3 nm to 7 nm.

5. The method of claim 3 , wherein the second width is between 5 nm to 9 nm.

6. The method of claim 1 , wherein a bottom surface of the epitaxial layer comprises a curve.

7. The method of claim 6 , wherein the buffer layer comprises a vertical thickness directly under a valley point of the curve.

8. The method of claim 7 , wherein the vertical thickness is between 7 nm to 11 nm.

9. The method of claim 1 , wherein a top surface of the epitaxial layer is even with a top surface of the substrate.

10. The method of claim 1 , wherein an etching to deposition ratio of the buffer layer is between 0.2 to 0.5.

Assignments (1)
RELEASE OF SECURITY INTEREST Recorded Sep 27, 2021
From: MMV FINANCIAL INC.
To: ANGIOCHEM INC.
Reel/Frame 057607/0994 →
Priority Claims (1)
TW 105125383 A · Aug 10, 2016 · national
Continuity (2)
Division 15259060 · Sep 8, 2016
Related Publication 20180269288A1 · Sep 20, 2018