Vertical overflow drain combined with vertical transistor
An image sensor pixel includes a photodiode disposed in a semiconductor material to generate image charge in response to light incident on a backside of the semiconductor material, and a pinning layer disposed in the semiconducting material and coupled to the photodiode. The pixel also includes a vertical overflow drain disposed in the semiconductor material and coupled to the pinning layer such that the pinning layer is disposed between the vertical overflow drain and the photodiode. A floating diffusion disposed in the semiconductor material proximate to the photodiode, and a vertical transfer transistor is disposed in part in the semiconductor material and coupled to the photodiode to transfer the image charge from the photodiode to the floating diffusion in response to a transfer signal applied to the gate terminal of the vertical transfer transistor.
1. An image sensor pixel, comprising:
a photodiode disposed in a semiconductor material to generate image charge in response to light incident on a backside of the semiconductor material;
a pinning layer disposed in the semiconducting material and coupled to the photodiode;
a vertical overflow drain disposed in the semiconductor material between a front side of the semiconductor material and the pinning layer, wherein the vertical overflow drain is in contact with the pinning layer and coupled to the pinning layer such that the pinning layer is disposed between the vertical overflow drain and the photodiode;
a floating diffusion disposed in the semiconductor material proximate to the photodiode;
a vertical transfer transistor disposed in part in the semiconductor material and coupled to the photodiode to transfer the image charge from the photodiode to the floating diffusion in response to a transfer signal applied to a gate terminal of the vertical transfer transistor; and
wherein first lateral bounds of the vertical overflow drain is less than second lateral bounds of the pinning layer to separate the photodiode from the vertical overflow drain.
2. The image sensor pixel of claim 1 , further comprising a gate oxide disposed on a frontside, opposite the backside, of the semiconductor material, and extending into the semiconductor material so that the gate oxide is disposed between the semiconductor material and a portion of the vertical transfer transistor that extends into the semiconductor material.
3. The image sensor pixel of claim 2 , wherein the vertical transfer transistor extends into the frontside of the semiconductor material.
4. The image sensor pixel of claim 3 , further comprising a shallow trench isolation structure extending into the frontside of the semiconductor material and surrounding the photodiode at least in part.
5. The image sensor pixel of claim 4 , wherein the shallow trench isolation structure includes a trench in the semiconductor material at least partially filled with an oxide.
6. The image sensor pixel of claim 4 , further comprising a deep isolation well extending from the shallow trench isolation structure to the backside of the semiconductor material.
7. The image sensor pixel of claim 6 , wherein the deep isolation well includes a doped region of the semiconductor material.
8. The image sensor pixel of claim 1 , wherein the gate terminal of the vertical transfer transistor is substantially “T”-shaped.
9. The image sensor pixel of claim 1 , wherein the photodiode includes a first majority charge carrier type, the pinning layer includes a second majority charge carrier type, and the vertical overflow drain includes the first majority charge carrier type.
10. The image sensor pixel of claim 9 , wherein the first majority charge carrier type is n-type, and wherein the second majority charge carrier type is p-type, and wherein the photodiode is disposed between the backside and the vertical overflow drain.
11. The image sensor pixel of claim 1 , wherein a first portion of the semiconductor material is laterally disposed between the vertical overflow drain and the vertical transfer transistor.
12. The image sensor pixel of claim 1 , wherein the vertical overflow drain is coupled to ground or a variable voltage source.
13. An image sensor system, comprising:
a plurality of pixels disposed in a semiconductor material positioned to receive light through a backside of the image sensor and generate image charge, wherein each pixel in the plurality of pixels includes:
a photodiode disposed in the semiconductor material;
a pinning layer disposed in the semiconducting material and coupled to the photodiode;
a vertical overflow drain disposed in the semiconductor material between a front side of the semiconductor material and the pinning layer, wherein the vertical overflow drain is in contact with the pinning layer and coupled to the pinning layer such that the pinning layer is disposed between the vertical overflow drain and the photodiode;
a floating diffusion disposed in the semiconductor material proximate to the photodiode;
a vertical transfer transistor disposed in part in the semiconductor material and coupled to the photodiode to transfer the image charge from the photodiode to the floating diffusion in response to a transfer signal applied to a gate terminal of the vertical transfer transistor;
readout circuitry coupled to the plurality of pixels to readout the image charge from the plurality of pixels;
control circuitry coupled to the plurality of pixels to control operation of the plurality of pixels; and
wherein first lateral bounds of the vertical overflow drain is less than second lateral bounds of the pinning layer to separate the photodiode from the vertical overflow drain.
14. The image sensor system of claim 13 , further comprising:
a reset transistor coupled to the floating diffusion to reset the image charge in the floating diffusion; and
a source follower transistor coupled to the floating diffusion to amplify the image charge on the floating diffusion for readout with the readout circuitry.
15. The image sensor system of claim 14 , further comprising function logic coupled to receive image data readout from the readout circuitry, and wherein the function logic is coupled to alter the image data.
16. The image sensor system of claim 11 , further comprising a gate oxide disposed on a frontside, opposite the backside, of the semiconductor material, and extending into the semiconductor material so that the gate oxide is disposed between the semiconductor material and a portion of the vertical transfer transistor that extends into the semiconductor material.
17. The image sensor system of claim 16 , wherein the vertical transfer transistor extends into the frontside of the semiconductor material.
18. The image sensor system of claim 17 , further comprising a shallow trench isolation structure extending into the frontside of the semiconductor material and surrounding the photodiode at least in part.
19. The image sensor system of claim 18 , wherein the shallow trench isolation structure includes a trench in the semiconductor material filled with an oxide.
20. The image sensor system of claim 18 , further comprising a deep isolation well extending from the shallow trench isolation structure to the backside of the semiconductor material.
21. The image sensor system of claim 20 , wherein the deep isolation well includes a doped region of the semiconductor material.
22. The image sensor system of claim 11 , wherein the gate terminal of the vertical transfer transistor is substantially “T”-shaped.